Search

David E. Graybill

Examiner (ID: 8531)

Most Active Art Unit
2894
Art Unit(s)
1763, 3727, 2894, 1107, 2822, 2812, 2814, 2827
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3941787 [patent_doc_number] => 05946544 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Circuit board-mounted IC package cooling and method' [patent_app_type] => 1 [patent_app_number] => 8/754965 [patent_app_country] => US [patent_app_date] => 1996-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2432 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946544.pdf [firstpage_image] =>[orig_patent_app_number] => 754965 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/754965
Circuit board-mounted IC package cooling and method Nov 21, 1996 Issued
Array ( [id] => 3730241 [patent_doc_number] => 05693570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Process for manufacturing a programmable power generation circuit for flash EEPROM memory systems' [patent_app_type] => 1 [patent_app_number] => 8/746833 [patent_app_country] => US [patent_app_date] => 1996-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8215 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/693/05693570.pdf [firstpage_image] =>[orig_patent_app_number] => 746833 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/746833
Process for manufacturing a programmable power generation circuit for flash EEPROM memory systems Nov 17, 1996 Issued
Array ( [id] => 1593262 [patent_doc_number] => 06491732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Wafer handling apparatus and method' [patent_app_type] => B1 [patent_app_number] => 08/749719 [patent_app_country] => US [patent_app_date] => 1996-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1196 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/491/06491732.pdf [firstpage_image] =>[orig_patent_app_number] => 08749719 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/749719
Wafer handling apparatus and method Nov 14, 1996 Issued
Array ( [id] => 3896136 [patent_doc_number] => 05897330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method of manufacturing thermoelectric power generation unit' [patent_app_type] => 1 [patent_app_number] => 8/737333 [patent_app_country] => US [patent_app_date] => 1996-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 46 [patent_no_of_words] => 20177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/897/05897330.pdf [firstpage_image] =>[orig_patent_app_number] => 737333 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/737333
Method of manufacturing thermoelectric power generation unit Nov 13, 1996 Issued
Array ( [id] => 4116402 [patent_doc_number] => 06071758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Process for manufacturing a chip card micromodule with protection barriers' [patent_app_type] => 1 [patent_app_number] => 8/748343 [patent_app_country] => US [patent_app_date] => 1996-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2888 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071758.pdf [firstpage_image] =>[orig_patent_app_number] => 748343 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/748343
Process for manufacturing a chip card micromodule with protection barriers Nov 12, 1996 Issued
Array ( [id] => 3884967 [patent_doc_number] => 05723347 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Semi-conductor chip test probe and process for manufacturing the probe' [patent_app_type] => 1 [patent_app_number] => 8/736543 [patent_app_country] => US [patent_app_date] => 1996-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 3815 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/723/05723347.pdf [firstpage_image] =>[orig_patent_app_number] => 736543 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/736543
Semi-conductor chip test probe and process for manufacturing the probe Oct 23, 1996 Issued
Array ( [id] => 3924024 [patent_doc_number] => 05928389 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method and apparatus for priority based scheduling of wafer processing within a multiple chamber semiconductor wafer processing tool' [patent_app_type] => 1 [patent_app_number] => 8/735370 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8857 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/928/05928389.pdf [firstpage_image] =>[orig_patent_app_number] => 735370 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/735370
Method and apparatus for priority based scheduling of wafer processing within a multiple chamber semiconductor wafer processing tool Oct 20, 1996 Issued
Array ( [id] => 4320005 [patent_doc_number] => 06242803 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Semiconductor devices with integral contact structures' [patent_app_type] => 1 [patent_app_number] => 8/735810 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 38 [patent_no_of_words] => 19975 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242803.pdf [firstpage_image] =>[orig_patent_app_number] => 735810 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/735810
Semiconductor devices with integral contact structures Oct 20, 1996 Issued
08/732649 PROCESS FOR THE MANUFACTURE OF PRINTED CIRCUIT BOARDS WITH PLATED RESISTORS Oct 15, 1996 Abandoned
Array ( [id] => 3933878 [patent_doc_number] => 05997588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Semiconductor processing system with gas curtain' [patent_app_type] => 1 [patent_app_number] => 8/729550 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 8830 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/997/05997588.pdf [firstpage_image] =>[orig_patent_app_number] => 729550 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/729550
Semiconductor processing system with gas curtain Oct 10, 1996 Issued
Array ( [id] => 3805928 [patent_doc_number] => 05854094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Process for manufacturing metal plane support for multi-layer lead frames' [patent_app_type] => 1 [patent_app_number] => 8/724429 [patent_app_country] => US [patent_app_date] => 1996-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4071 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854094.pdf [firstpage_image] =>[orig_patent_app_number] => 724429 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/724429
Process for manufacturing metal plane support for multi-layer lead frames Sep 30, 1996 Issued
Array ( [id] => 3688751 [patent_doc_number] => 05649981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Tool and fixture for the removal of tab leads bonded to semiconductor die pads' [patent_app_type] => 1 [patent_app_number] => 8/706768 [patent_app_country] => US [patent_app_date] => 1996-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2236 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/649/05649981.pdf [firstpage_image] =>[orig_patent_app_number] => 706768 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/706768
Tool and fixture for the removal of tab leads bonded to semiconductor die pads Sep 22, 1996 Issued
Array ( [id] => 4172080 [patent_doc_number] => 06083768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components' [patent_app_type] => 1 [patent_app_number] => 8/709182 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 43 [patent_no_of_words] => 5461 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083768.pdf [firstpage_image] =>[orig_patent_app_number] => 709182 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709182
Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components Sep 5, 1996 Issued
Array ( [id] => 3758635 [patent_doc_number] => 05772701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Method of making tantalum capacitors' [patent_app_type] => 1 [patent_app_number] => 8/708424 [patent_app_country] => US [patent_app_date] => 1996-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1462 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/772/05772701.pdf [firstpage_image] =>[orig_patent_app_number] => 708424 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/708424
Method of making tantalum capacitors Sep 4, 1996 Issued
Array ( [id] => 3828128 [patent_doc_number] => 05739054 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Process for forming an encapsulated electronic component having an integral resin projection' [patent_app_type] => 1 [patent_app_number] => 8/707666 [patent_app_country] => US [patent_app_date] => 1996-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3592 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/739/05739054.pdf [firstpage_image] =>[orig_patent_app_number] => 707666 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/707666
Process for forming an encapsulated electronic component having an integral resin projection Sep 3, 1996 Issued
Array ( [id] => 3885834 [patent_doc_number] => 05893727 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Method for manufacturing a massive parallel interconnection attachment using flexible circuit' [patent_app_type] => 1 [patent_app_number] => 8/689629 [patent_app_country] => US [patent_app_date] => 1996-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2132 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/893/05893727.pdf [firstpage_image] =>[orig_patent_app_number] => 689629 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/689629
Method for manufacturing a massive parallel interconnection attachment using flexible circuit Aug 12, 1996 Issued
Array ( [id] => 3939120 [patent_doc_number] => 05939773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Semiconductor laser package including a lead frame and plastic resin housing' [patent_app_type] => 1 [patent_app_number] => 8/692355 [patent_app_country] => US [patent_app_date] => 1996-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4776 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/939/05939773.pdf [firstpage_image] =>[orig_patent_app_number] => 692355 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/692355
Semiconductor laser package including a lead frame and plastic resin housing Aug 4, 1996 Issued
08/681599 TWO-POLE SMT MINIATURE HOUSING FOR SEMICONDUCTOR COMPONENTS AND METHOD FOR THE MANUFACTURE THEREOF Jul 28, 1996 Abandoned
Array ( [id] => 4046234 [patent_doc_number] => 05869357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Metallization and wire bonding process for manufacturing power semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/681621 [patent_app_country] => US [patent_app_date] => 1996-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2198 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869357.pdf [firstpage_image] =>[orig_patent_app_number] => 681621 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/681621
Metallization and wire bonding process for manufacturing power semiconductor devices Jul 28, 1996 Issued
Array ( [id] => 4118861 [patent_doc_number] => 06120301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/686503 [patent_app_country] => US [patent_app_date] => 1996-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 7865 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/120/06120301.pdf [firstpage_image] =>[orig_patent_app_number] => 686503 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/686503
Semiconductor device and method of manufacturing the same Jul 23, 1996 Issued
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