Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3768646 [patent_doc_number] => 05849607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Process for attaching a lead frame to a semiconductor chip' [patent_app_type] => 1 [patent_app_number] => 8/598849 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2581 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/849/05849607.pdf [firstpage_image] =>[orig_patent_app_number] => 598849 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/598849
Process for attaching a lead frame to a semiconductor chip Feb 8, 1996 Issued
Array ( [id] => 3731249 [patent_doc_number] => 05665649 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Process for forming a semiconductor device base array and mounting semiconductor devices thereon' [patent_app_type] => 1 [patent_app_number] => 8/596589 [patent_app_country] => US [patent_app_date] => 1996-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 5256 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/665/05665649.pdf [firstpage_image] =>[orig_patent_app_number] => 596589 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/596589
Process for forming a semiconductor device base array and mounting semiconductor devices thereon Feb 4, 1996 Issued
Array ( [id] => 1458817 [patent_doc_number] => 06426273 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Preprocessing method of metal film forming process' [patent_app_type] => B1 [patent_app_number] => 08/592543 [patent_app_country] => US [patent_app_date] => 1996-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4115 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426273.pdf [firstpage_image] =>[orig_patent_app_number] => 08592543 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/592543
Preprocessing method of metal film forming process Jan 25, 1996 Issued
Array ( [id] => 3940314 [patent_doc_number] => 05954842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Lead finger clamp assembly' [patent_app_type] => 1 [patent_app_number] => 8/592058 [patent_app_country] => US [patent_app_date] => 1996-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4193 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/954/05954842.pdf [firstpage_image] =>[orig_patent_app_number] => 592058 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/592058
Lead finger clamp assembly Jan 25, 1996 Issued
08/591365 TEST AND TEAR-AWAY BOND PAD DESIGN Jan 24, 1996 Abandoned
Array ( [id] => 3722649 [patent_doc_number] => 05651798 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Workpiece monitoring process using a workpiece carrier having an identification code' [patent_app_type] => 1 [patent_app_number] => 8/588565 [patent_app_country] => US [patent_app_date] => 1996-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/651/05651798.pdf [firstpage_image] =>[orig_patent_app_number] => 588565 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588565
Workpiece monitoring process using a workpiece carrier having an identification code Jan 17, 1996 Issued
Array ( [id] => 3832044 [patent_doc_number] => 05712190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Process for controlling distance between integrated circuit chips in an electronic module' [patent_app_type] => 1 [patent_app_number] => 8/585579 [patent_app_country] => US [patent_app_date] => 1996-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3627 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712190.pdf [firstpage_image] =>[orig_patent_app_number] => 585579 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/585579
Process for controlling distance between integrated circuit chips in an electronic module Jan 15, 1996 Issued
Array ( [id] => 3694897 [patent_doc_number] => 05661086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Process for manufacturing a plurality of strip lead frame semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/584299 [patent_app_country] => US [patent_app_date] => 1996-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7109 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 573 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661086.pdf [firstpage_image] =>[orig_patent_app_number] => 584299 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/584299
Process for manufacturing a plurality of strip lead frame semiconductor devices Jan 10, 1996 Issued
Array ( [id] => 3768577 [patent_doc_number] => 05849602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Resist processing process' [patent_app_type] => 1 [patent_app_number] => 8/582280 [patent_app_country] => US [patent_app_date] => 1996-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/849/05849602.pdf [firstpage_image] =>[orig_patent_app_number] => 582280 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582280
Resist processing process Jan 2, 1996 Issued
Array ( [id] => 1381105 [patent_doc_number] => 06551845 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Method of temporarily securing a die to a burn-in carrier' [patent_app_type] => B1 [patent_app_number] => 08/581905 [patent_app_country] => US [patent_app_date] => 1996-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2725 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/551/06551845.pdf [firstpage_image] =>[orig_patent_app_number] => 08581905 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581905
Method of temporarily securing a die to a burn-in carrier Jan 1, 1996 Issued
Array ( [id] => 4063623 [patent_doc_number] => 06008072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Tape automated bonding method' [patent_app_type] => 1 [patent_app_number] => 8/579511 [patent_app_country] => US [patent_app_date] => 1995-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 4052 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008072.pdf [firstpage_image] =>[orig_patent_app_number] => 579511 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/579511
Tape automated bonding method Dec 26, 1995 Issued
Array ( [id] => 3952531 [patent_doc_number] => 05940679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Method of checking electric circuits of semiconductor device and conductive adhesive for checking usage' [patent_app_type] => 1 [patent_app_number] => 8/577485 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3682 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940679.pdf [firstpage_image] =>[orig_patent_app_number] => 577485 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/577485
Method of checking electric circuits of semiconductor device and conductive adhesive for checking usage Dec 21, 1995 Issued
08/574711 CONSOLIDATED CHIP DESIGN FOR WIRE BOND AND FLIP-CHIP PACKAGE TECHNOLOGIES Dec 20, 1995 Abandoned
Array ( [id] => 1578251 [patent_doc_number] => 06448169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Apparatus and method for use in manufacturing semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 08/576185 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2787 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448169.pdf [firstpage_image] =>[orig_patent_app_number] => 08576185 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576185
Apparatus and method for use in manufacturing semiconductor devices Dec 20, 1995 Issued
Array ( [id] => 3759544 [patent_doc_number] => 05851845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Process for packaging a semiconductor die using dicing and testing' [patent_app_type] => 1 [patent_app_number] => 8/574403 [patent_app_country] => US [patent_app_date] => 1995-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 2570 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/851/05851845.pdf [firstpage_image] =>[orig_patent_app_number] => 574403 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/574403
Process for packaging a semiconductor die using dicing and testing Dec 17, 1995 Issued
Array ( [id] => 4097580 [patent_doc_number] => 06048751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Process for manufacture of composite semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/572275 [patent_app_country] => US [patent_app_date] => 1995-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3597 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048751.pdf [firstpage_image] =>[orig_patent_app_number] => 572275 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/572275
Process for manufacture of composite semiconductor devices Dec 12, 1995 Issued
Array ( [id] => 3736331 [patent_doc_number] => 05842257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Apparatus for and method of fabricating semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/571594 [patent_app_country] => US [patent_app_date] => 1995-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 41 [patent_no_of_words] => 17676 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/842/05842257.pdf [firstpage_image] =>[orig_patent_app_number] => 571594 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/571594
Apparatus for and method of fabricating semiconductor devices Dec 12, 1995 Issued
Array ( [id] => 4006433 [patent_doc_number] => 05888847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Technique for mounting a semiconductor die' [patent_app_type] => 1 [patent_app_number] => 8/569501 [patent_app_country] => US [patent_app_date] => 1995-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2934 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/888/05888847.pdf [firstpage_image] =>[orig_patent_app_number] => 569501 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/569501
Technique for mounting a semiconductor die Dec 7, 1995 Issued
Array ( [id] => 3655877 [patent_doc_number] => 05667535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Wafer drying apparatus with balancing mechanism for turntable therein' [patent_app_type] => 1 [patent_app_number] => 8/569723 [patent_app_country] => US [patent_app_date] => 1995-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2495 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/667/05667535.pdf [firstpage_image] =>[orig_patent_app_number] => 569723 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/569723
Wafer drying apparatus with balancing mechanism for turntable therein Dec 7, 1995 Issued
08/567193 METHOD OF PACKAGING FRAGILE DEVICES WITH A GEL MEDIUM CONFINED BY A RIM MEMBER Dec 4, 1995 Abandoned
Menu