Search

David E. Graybill

Examiner (ID: 8531)

Most Active Art Unit
2894
Art Unit(s)
1763, 3727, 2894, 1107, 2822, 2812, 2814, 2827
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
08/648165 CLEANING APPARATUS, SEMICONDUCTOR PRODUCTION EQUIPMENT, AND SEMICONDUCTOR PRODUCTION LINE Aug 18, 1995 Abandoned
Array ( [id] => 4085019 [patent_doc_number] => 06025258 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method for fabricating solder bumps by forming solder balls with a solder ball forming member' [patent_app_type] => 1 [patent_app_number] => 8/516284 [patent_app_country] => US [patent_app_date] => 1995-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 55 [patent_no_of_words] => 9976 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/025/06025258.pdf [firstpage_image] =>[orig_patent_app_number] => 516284 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/516284
Method for fabricating solder bumps by forming solder balls with a solder ball forming member Aug 16, 1995 Issued
Array ( [id] => 3740362 [patent_doc_number] => 05786237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method for forming a monolithic electronic module by stacking planar arrays of integrated circuit chips' [patent_app_type] => 1 [patent_app_number] => 8/515611 [patent_app_country] => US [patent_app_date] => 1995-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/786/05786237.pdf [firstpage_image] =>[orig_patent_app_number] => 515611 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/515611
Method for forming a monolithic electronic module by stacking planar arrays of integrated circuit chips Aug 15, 1995 Issued
Array ( [id] => 3876694 [patent_doc_number] => 05728599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Printable superconductive leadframes for semiconductor device assembly' [patent_app_type] => 1 [patent_app_number] => 8/432539 [patent_app_country] => US [patent_app_date] => 1995-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5125 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/728/05728599.pdf [firstpage_image] =>[orig_patent_app_number] => 432539 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/432539
Printable superconductive leadframes for semiconductor device assembly Aug 6, 1995 Issued
Array ( [id] => 3722632 [patent_doc_number] => 05651797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Apparatus and method for the immersion cleaning and transport of semiconductor components' [patent_app_type] => 1 [patent_app_number] => 8/511975 [patent_app_country] => US [patent_app_date] => 1995-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3435 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/651/05651797.pdf [firstpage_image] =>[orig_patent_app_number] => 511975 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/511975
Apparatus and method for the immersion cleaning and transport of semiconductor components Aug 6, 1995 Issued
Array ( [id] => 3938387 [patent_doc_number] => 05872051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Process for transferring material to semiconductor chip conductive pads using a transfer substrate' [patent_app_type] => 1 [patent_app_number] => 8/510401 [patent_app_country] => US [patent_app_date] => 1995-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 94 [patent_no_of_words] => 27106 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872051.pdf [firstpage_image] =>[orig_patent_app_number] => 510401 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510401
Process for transferring material to semiconductor chip conductive pads using a transfer substrate Aug 1, 1995 Issued
Array ( [id] => 3824353 [patent_doc_number] => 05731222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Externally connected thin electronic circuit having recessed bonding pads' [patent_app_type] => 1 [patent_app_number] => 8/509849 [patent_app_country] => US [patent_app_date] => 1995-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2364 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/731/05731222.pdf [firstpage_image] =>[orig_patent_app_number] => 509849 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509849
Externally connected thin electronic circuit having recessed bonding pads Jul 31, 1995 Issued
Array ( [id] => 3627284 [patent_doc_number] => 05686352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Method for making a tab semiconductor device with self-aligning cavity and intrinsic standoff' [patent_app_type] => 1 [patent_app_number] => 8/509442 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3837 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/686/05686352.pdf [firstpage_image] =>[orig_patent_app_number] => 509442 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509442
Method for making a tab semiconductor device with self-aligning cavity and intrinsic standoff Jul 30, 1995 Issued
Array ( [id] => 3867222 [patent_doc_number] => 05837562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Process for bonding a shell to a substrate for packaging a semiconductor' [patent_app_type] => 1 [patent_app_number] => 8/499411 [patent_app_country] => US [patent_app_date] => 1995-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3569 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/837/05837562.pdf [firstpage_image] =>[orig_patent_app_number] => 499411 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/499411
Process for bonding a shell to a substrate for packaging a semiconductor Jul 6, 1995 Issued
08/433403 LOCAL HARDENING METHOD OF A SEMICONDUCTOR INTEGRATED CIRCUIT Jul 5, 1995 Abandoned
Array ( [id] => 3614495 [patent_doc_number] => 05593465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Mounting for carrier bodies in an apparatus for the deposition of semiconductor material' [patent_app_type] => 1 [patent_app_number] => 8/490303 [patent_app_country] => US [patent_app_date] => 1995-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1632 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/593/05593465.pdf [firstpage_image] =>[orig_patent_app_number] => 490303 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490303
Mounting for carrier bodies in an apparatus for the deposition of semiconductor material Jun 13, 1995 Issued
Array ( [id] => 3647339 [patent_doc_number] => 05683943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Process for etching a semiconductor lead frame' [patent_app_type] => 1 [patent_app_number] => 8/489319 [patent_app_country] => US [patent_app_date] => 1995-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 8749 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/683/05683943.pdf [firstpage_image] =>[orig_patent_app_number] => 489319 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/489319
Process for etching a semiconductor lead frame Jun 11, 1995 Issued
Array ( [id] => 3993301 [patent_doc_number] => 05985692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Process for flip-chip bonding a semiconductor die having gold bump electrodes' [patent_app_type] => 1 [patent_app_number] => 8/478114 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4247 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/985/05985692.pdf [firstpage_image] =>[orig_patent_app_number] => 478114 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478114
Process for flip-chip bonding a semiconductor die having gold bump electrodes Jun 6, 1995 Issued
Array ( [id] => 4007037 [patent_doc_number] => 05888889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Integrated structure pad assembly for lead bonding' [patent_app_type] => 1 [patent_app_number] => 8/483315 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2128 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/888/05888889.pdf [firstpage_image] =>[orig_patent_app_number] => 483315 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/483315
Integrated structure pad assembly for lead bonding Jun 6, 1995 Issued
Array ( [id] => 3649462 [patent_doc_number] => 05605863 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-25 [patent_title] => 'Device packaging using heat spreaders and assisted deposition of wire bonds' [patent_app_type] => 1 [patent_app_number] => 8/472103 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/605/05605863.pdf [firstpage_image] =>[orig_patent_app_number] => 472103 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472103
Device packaging using heat spreaders and assisted deposition of wire bonds Jun 6, 1995 Issued
08/484813 LEAD FRAME FOR INTEGRATED CIRCUITS Jun 6, 1995 Abandoned
Array ( [id] => 3734610 [patent_doc_number] => 05698465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Process for manufacturing an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating' [patent_app_type] => 1 [patent_app_number] => 8/474305 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2417 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/698/05698465.pdf [firstpage_image] =>[orig_patent_app_number] => 474305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/474305
Process for manufacturing an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating Jun 6, 1995 Issued
Array ( [id] => 3725119 [patent_doc_number] => 05700697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Method for packaging an integrated circuit using a reconstructed package' [patent_app_type] => 1 [patent_app_number] => 8/471739 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/700/05700697.pdf [firstpage_image] =>[orig_patent_app_number] => 471739 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/471739
Method for packaging an integrated circuit using a reconstructed package Jun 5, 1995 Issued
Array ( [id] => 4394333 [patent_doc_number] => 06297074 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof' [patent_app_type] => 1 [patent_app_number] => 8/464577 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 5069 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297074.pdf [firstpage_image] =>[orig_patent_app_number] => 464577 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/464577
Film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof Jun 4, 1995 Issued
08/463113 METHOD OF ASSEMBLING A SEMICONDUCTOR DEVICE USING A MAGNET Jun 4, 1995 Abandoned
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