| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 4234704
[patent_doc_number] => 06165813
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Replacing semiconductor chips in a full-width chip array'
[patent_app_type] => 1
[patent_app_number] => 8/416127
[patent_app_country] => US
[patent_app_date] => 1995-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/165/06165813.pdf
[firstpage_image] =>[orig_patent_app_number] => 416127
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/416127 | Replacing semiconductor chips in a full-width chip array | Apr 2, 1995 | Issued |
Array
(
[id] => 3759992
[patent_doc_number] => 05849043
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-15
[patent_title] => 'Apparatus for laser ion doping'
[patent_app_type] => 1
[patent_app_number] => 8/411973
[patent_app_country] => US
[patent_app_date] => 1995-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 11446
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/849/05849043.pdf
[firstpage_image] =>[orig_patent_app_number] => 411973
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/411973 | Apparatus for laser ion doping | Mar 27, 1995 | Issued |
Array
(
[id] => 3644640
[patent_doc_number] => 05605547
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-25
[patent_title] => 'Method and apparatus for mounting a component to a substrate using an anisotropic adhesive, a compressive cover film, and a conveyor'
[patent_app_type] => 1
[patent_app_number] => 8/410889
[patent_app_country] => US
[patent_app_date] => 1995-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 2682
[patent_no_of_claims] => 23
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[pdf_file] => patents/05/605/05605547.pdf
[firstpage_image] =>[orig_patent_app_number] => 410889
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/410889 | Method and apparatus for mounting a component to a substrate using an anisotropic adhesive, a compressive cover film, and a conveyor | Mar 26, 1995 | Issued |
Array
(
[id] => 3620665
[patent_doc_number] => 05641713
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-24
[patent_title] => 'Process for forming a room temperature seal between a base cavity and a lid using an organic sealant and a metal seal ring'
[patent_app_type] => 1
[patent_app_number] => 8/410153
[patent_app_country] => US
[patent_app_date] => 1995-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 3510
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/641/05641713.pdf
[firstpage_image] =>[orig_patent_app_number] => 410153
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/410153 | Process for forming a room temperature seal between a base cavity and a lid using an organic sealant and a metal seal ring | Mar 22, 1995 | Issued |
Array
(
[id] => 3588533
[patent_doc_number] => 05585282
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor'
[patent_app_type] => 1
[patent_app_number] => 8/406637
[patent_app_country] => US
[patent_app_date] => 1995-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 5698
[patent_no_of_claims] => 20
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/585/05585282.pdf
[firstpage_image] =>[orig_patent_app_number] => 406637
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/406637 | Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor | Mar 19, 1995 | Issued |
Array
(
[id] => 3587392
[patent_doc_number] => 05550083
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-27
[patent_title] => 'Process of wirebond pad repair and reuse'
[patent_app_type] => 1
[patent_app_number] => 8/405015
[patent_app_country] => US
[patent_app_date] => 1995-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3793
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/550/05550083.pdf
[firstpage_image] =>[orig_patent_app_number] => 405015
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/405015 | Process of wirebond pad repair and reuse | Mar 15, 1995 | Issued |
| 08/402753 | DOUBLE-PACKAGED MULTI-CHIP SEMICONDUCTOR MODULE | Mar 9, 1995 | Abandoned |
Array
(
[id] => 3694153
[patent_doc_number] => 05650357
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Process for manufacturing a lead frame capacitor and capacitively-coupled isolator circuit using same'
[patent_app_type] => 1
[patent_app_number] => 8/401033
[patent_app_country] => US
[patent_app_date] => 1995-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4124
[patent_no_of_claims] => 8
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[patent_words_short_claim] => 153
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/650/05650357.pdf
[firstpage_image] =>[orig_patent_app_number] => 401033
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/401033 | Process for manufacturing a lead frame capacitor and capacitively-coupled isolator circuit using same | Mar 7, 1995 | Issued |
Array
(
[id] => 3734665
[patent_doc_number] => 05698469
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-16
[patent_title] => 'Method of making a hybrid circuit with a chip having active devices with extra-chip interconnections'
[patent_app_type] => 1
[patent_app_number] => 8/400025
[patent_app_country] => US
[patent_app_date] => 1995-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 3812
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/698/05698469.pdf
[firstpage_image] =>[orig_patent_app_number] => 400025
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/400025 | Method of making a hybrid circuit with a chip having active devices with extra-chip interconnections | Mar 5, 1995 | Issued |
| 08/393677 | METHOD AND SYSTEM FOR FABRICATING A SEMICONDUCTOR DEVICE | Feb 23, 1995 | Abandoned |
Array
(
[id] => 3849152
[patent_doc_number] => 05766985
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Process for encapsulating a semiconductor device having a heat sink'
[patent_app_type] => 1
[patent_app_number] => 8/384753
[patent_app_country] => US
[patent_app_date] => 1995-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/05/766/05766985.pdf
[firstpage_image] =>[orig_patent_app_number] => 384753
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/384753 | Process for encapsulating a semiconductor device having a heat sink | Feb 5, 1995 | Issued |
Array
(
[id] => 3588520
[patent_doc_number] => 05585281
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Process and apparatus for forming and testing semiconductor package leads'
[patent_app_type] => 1
[patent_app_number] => 8/383141
[patent_app_country] => US
[patent_app_date] => 1995-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2433
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/585/05585281.pdf
[firstpage_image] =>[orig_patent_app_number] => 383141
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/383141 | Process and apparatus for forming and testing semiconductor package leads | Feb 2, 1995 | Issued |
| 08/381676 | THERMAL CROSSTALK REDUCTION FOR INFRARED DETECTORS WITH COMMON ELECTRODES | Jan 30, 1995 | Abandoned |
| 08/380439 | FLIP-CHIP INTEGRATED CIRCUIT | Jan 29, 1995 | Abandoned |
| 90/003703 | PROCESS FOR FORMING CONTACT OPENINGS THROUGH OXIDE LAYERS | Jan 26, 1995 | Issued |
Array
(
[id] => 3519066
[patent_doc_number] => 05529950
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Method for manufacturing a cubically integrated circuit arrangement'
[patent_app_type] => 1
[patent_app_number] => 8/377049
[patent_app_country] => US
[patent_app_date] => 1995-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3255
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[pdf_file] => patents/05/529/05529950.pdf
[firstpage_image] =>[orig_patent_app_number] => 377049
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/377049 | Method for manufacturing a cubically integrated circuit arrangement | Jan 22, 1995 | Issued |
Array
(
[id] => 3687167
[patent_doc_number] => 05643830
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-01
[patent_title] => 'Process for manufacturing off-axis power branches for interior bond pad arrangements'
[patent_app_type] => 1
[patent_app_number] => 8/377211
[patent_app_country] => US
[patent_app_date] => 1995-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/643/05643830.pdf
[firstpage_image] =>[orig_patent_app_number] => 377211
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/377211 | Process for manufacturing off-axis power branches for interior bond pad arrangements | Jan 22, 1995 | Issued |
Array
(
[id] => 3655915
[patent_doc_number] => 05622873
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Process for manufacturing a resin molded image pick-up semiconductor chip having a window'
[patent_app_type] => 1
[patent_app_number] => 8/376723
[patent_app_country] => US
[patent_app_date] => 1995-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3001
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/622/05622873.pdf
[firstpage_image] =>[orig_patent_app_number] => 376723
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376723 | Process for manufacturing a resin molded image pick-up semiconductor chip having a window | Jan 22, 1995 | Issued |
Array
(
[id] => 3522040
[patent_doc_number] => 05489551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Method of fabricating thin film circuits with high density circuit interconnects by pyrolosis of an adhesive'
[patent_app_type] => 1
[patent_app_number] => 8/376209
[patent_app_country] => US
[patent_app_date] => 1995-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2771
[patent_no_of_claims] => 14
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/489/05489551.pdf
[firstpage_image] =>[orig_patent_app_number] => 376209
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376209 | Method of fabricating thin film circuits with high density circuit interconnects by pyrolosis of an adhesive | Jan 19, 1995 | Issued |
| 08/374429 | METHOD FOR FABRICATING SOLDER BUMPS BY FORMING SOLDER BALLS | Jan 18, 1995 | Abandoned |