David E. Graybill

Array ( [id] => 3492101 [patent_doc_number] => 05536677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Method of forming conductive bumps on a semiconductor device using a double mask structure' [patent_app_type] => 1 [patent_app_number] => 8/348009 [patent_app_country] => US [patent_app_date] => 1994-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5053 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/536/05536677.pdf [firstpage_image] =>[orig_patent_app_number] => 348009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3506203 [patent_doc_number] => 05569625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Process for manufacturing a plural stacked leadframe semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/345755 [patent_app_country] => US [patent_app_date] => 1994-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 5339 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/569/05569625.pdf [firstpage_image] =>[orig_patent_app_number] => 345755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3876708 [patent_doc_number] => 05728600 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Circuit encapsulation process' [patent_app_type] => 1 [patent_app_number] => 8/340162 [patent_app_country] => US [patent_app_date] => 1994-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 3 [patent_no_of_words] => 3562 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/728/05728600.pdf [firstpage_image] =>[orig_patent_app_number] => 340162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3460764 [patent_doc_number] => 05468655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Method for forming a temporary attachment between a semiconductor die and a substrate using a metal paste comprising spherical modules' [patent_app_type] => 1 [patent_app_number] => 8/332311 [patent_app_country] => US [patent_app_date] => 1994-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/468/05468655.pdf [firstpage_image] =>[orig_patent_app_number] => 332311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3785888 [patent_doc_number] => 05840599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Process of packaging an integrated circuit with a conductive material between a lead frame and the face of the circuit' [patent_app_type] => 1 [patent_app_number] => 8/330171 [patent_app_country] => US [patent_app_date] => 1994-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3931 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/840/05840599.pdf [firstpage_image] =>[orig_patent_app_number] => 330171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3509868 [patent_doc_number] => 05563103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Method for manufacturing thermoplastic resin molded semiconductor' [patent_app_type] => 1 [patent_app_number] => 8/328407 [patent_app_country] => US [patent_app_date] => 1994-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 2108 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/563/05563103.pdf [firstpage_image] =>[orig_patent_app_number] => 328407 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3509713 [patent_doc_number] => 05587341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Process for manufacturing a stacked integrated circuit package' [patent_app_type] => 1 [patent_app_number] => 8/323709 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 48 [patent_no_of_words] => 10094 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/587/05587341.pdf [firstpage_image] =>[orig_patent_app_number] => 323709 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3412534 [patent_doc_number] => 05444025 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-22 [patent_title] => 'Process for encapsulating a semiconductor package having a heat sink using a jig' [patent_app_type] => 1 [patent_app_number] => 8/324494 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3235 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/444/05444025.pdf [firstpage_image] =>[orig_patent_app_number] => 324494 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3583811 [patent_doc_number] => 05498767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-12 [patent_title] => 'Method for positioning bond pads in a semiconductor die layout' [patent_app_type] => 1 [patent_app_number] => 8/321643 [patent_app_country] => US [patent_app_date] => 1994-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8065 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/498/05498767.pdf [firstpage_image] =>[orig_patent_app_number] => 321643 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3495943 [patent_doc_number] => 05532186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Process for manufacturing bumped tab tape' [patent_app_type] => 1 [patent_app_number] => 8/319486 [patent_app_country] => US [patent_app_date] => 1994-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2858 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532186.pdf [firstpage_image] =>[orig_patent_app_number] => 319486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3612560 [patent_doc_number] => 05534442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Process of providing uniform photoresist thickness on an opto-electronic device' [patent_app_type] => 1 [patent_app_number] => 8/319435 [patent_app_country] => US [patent_app_date] => 1994-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4037 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/534/05534442.pdf [firstpage_image] =>[orig_patent_app_number] => 319435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3660072 [patent_doc_number] => 05656507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Process for self-aligning circuit components brought into abutment by surface tension of a molten material and bonding under tension' [patent_app_type] => 1 [patent_app_number] => 8/256939 [patent_app_country] => US [patent_app_date] => 1994-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2744 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656507.pdf [firstpage_image] =>[orig_patent_app_number] => 256939 [rel_patent_id] =>[rel_patent_doc_number] =>)