David E. Graybill

Array ( [id] => 3656261 [patent_doc_number] => 05622897 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Process of manufacturing a drop-on-demand ink jet printhead having thermoelectric temperature control means' [patent_app_type] => 1 [patent_app_number] => 8/272145 [patent_app_country] => US [patent_app_date] => 1994-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 9622 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/622/05622897.pdf [firstpage_image] =>[orig_patent_app_number] => 272145 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3458962 [patent_doc_number] => 05441907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Process for manufacturing a plug-diode mask ROM' [patent_app_type] => 1 [patent_app_number] => 8/266505 [patent_app_country] => US [patent_app_date] => 1994-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2702 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/441/05441907.pdf [firstpage_image] =>[orig_patent_app_number] => 266505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3442772 [patent_doc_number] => 05423889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-13 [patent_title] => 'Process for manufacturing a multi-port adhesive dispensing tool' [patent_app_type] => 1 [patent_app_number] => 8/265355 [patent_app_country] => US [patent_app_date] => 1994-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3096 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/423/05423889.pdf [firstpage_image] =>[orig_patent_app_number] => 265355 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3727265 [patent_doc_number] => 05670429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Process of conveying an encapsulated electronic component by engaging an integral resin projection' [patent_app_type] => 1 [patent_app_number] => 8/260047 [patent_app_country] => US [patent_app_date] => 1994-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3591 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/670/05670429.pdf [firstpage_image] =>[orig_patent_app_number] => 260047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4097621 [patent_doc_number] => 06048754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Method of manufacturing a semiconductor device with an airtight space formed internally within a hollow package' [patent_app_type] => 1 [patent_app_number] => 8/260977 [patent_app_country] => US [patent_app_date] => 1994-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4357 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048754.pdf [firstpage_image] =>[orig_patent_app_number] => 260977 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3461134 [patent_doc_number] => 05468681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Process for interconnecting conductive substrates using an interposer having conductive plastic filled vias' [patent_app_type] => 1 [patent_app_number] => 8/260078 [patent_app_country] => US [patent_app_date] => 1994-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 47 [patent_no_of_words] => 22365 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/468/05468681.pdf [firstpage_image] =>[orig_patent_app_number] => 260078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3982621 [patent_doc_number] => 05861323 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'Process for manufacturing metal ball electrodes for a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/270661 [patent_app_country] => US [patent_app_date] => 1994-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4661 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/861/05861323.pdf [firstpage_image] =>[orig_patent_app_number] => 270661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3442134 [patent_doc_number] => 05466635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-14 [patent_title] => 'Process for making an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating' [patent_app_type] => 1 [patent_app_number] => 8/252691 [patent_app_country] => US [patent_app_date] => 1994-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2416 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/466/05466635.pdf [firstpage_image] =>[orig_patent_app_number] => 252691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3814965 [patent_doc_number] => 05770468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'Process for mounting a semiconductor chip to a chip carrier by exposing a solder layer to a reducing atmosphere' [patent_app_type] => 1 [patent_app_number] => 8/245657 [patent_app_country] => US [patent_app_date] => 1994-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 51 [patent_no_of_words] => 5994 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/770/05770468.pdf [firstpage_image] =>[orig_patent_app_number] => 245657 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3426699 [patent_doc_number] => 05403754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-04 [patent_title] => 'Lithography method for direct alignment of integrated circuits multiple layers' [patent_app_type] => 1 [patent_app_number] => 8/238194 [patent_app_country] => US [patent_app_date] => 1994-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2245 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/403/05403754.pdf [firstpage_image] =>[orig_patent_app_number] => 238194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4394361 [patent_doc_number] => 06297076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Process for preparing a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 8/234073 [patent_app_country] => US [patent_app_date] => 1994-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 7665 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297076.pdf [firstpage_image] =>[orig_patent_app_number] => 234073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3606024 [patent_doc_number] => 05565008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Process of raising a semiconductor device out of a pallet using a positioning rod' [patent_app_type] => 1 [patent_app_number] => 8/234595 [patent_app_country] => US [patent_app_date] => 1994-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 3599 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/565/05565008.pdf [firstpage_image] =>[orig_patent_app_number] => 234595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3832071 [patent_doc_number] => 05712192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Process for connecting an electrical device to a circuit substrate' [patent_app_type] => 1 [patent_app_number] => 8/233193 [patent_app_country] => US [patent_app_date] => 1994-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4950 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712192.pdf [firstpage_image] =>[orig_patent_app_number] => 233193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3460051 [patent_doc_number] => 05391514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'Low temperature ternary C4 flip chip bonding method' [patent_app_type] => 1 [patent_app_number] => 8/229883 [patent_app_country] => US [patent_app_date] => 1994-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1771 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/391/05391514.pdf [firstpage_image] =>[orig_patent_app_number] => 229883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3717185 [patent_doc_number] => 05681356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Method and apparatus for producing a plastic molded chip card having reduced wall thickness' [patent_app_type] => 1 [patent_app_number] => 8/146087 [patent_app_country] => US [patent_app_date] => 1994-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5726 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/681/05681356.pdf [firstpage_image] =>[orig_patent_app_number] => 146087 [rel_patent_id] =>[rel_patent_doc_number] =>)