| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3006931
[patent_doc_number] => 05332405
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-26
[patent_title] => 'Apparatus for manufacturing semiconductor lead frames in a circular path'
[patent_app_type] => 1
[patent_app_number] => 7/938931
[patent_app_country] => US
[patent_app_date] => 1992-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2927
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/332/05332405.pdf
[firstpage_image] =>[orig_patent_app_number] => 938931
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/938931 | Apparatus for manufacturing semiconductor lead frames in a circular path | Aug 31, 1992 | Issued |
Array
(
[id] => 2887867
[patent_doc_number] => 05240588
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Method for electroplating the lead pins of a semiconductor device pin grid array package'
[patent_app_type] => 1
[patent_app_number] => 7/936271
[patent_app_country] => US
[patent_app_date] => 1992-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2336
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/240/05240588.pdf
[firstpage_image] =>[orig_patent_app_number] => 936271
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/936271 | Method for electroplating the lead pins of a semiconductor device pin grid array package | Aug 26, 1992 | Issued |
Array
(
[id] => 3122323
[patent_doc_number] => 05384286
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-24
[patent_title] => 'Process for encapsulating a semiconductor chip, leadframe and heatsink'
[patent_app_type] => 1
[patent_app_number] => 7/928285
[patent_app_country] => US
[patent_app_date] => 1992-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2443
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/384/05384286.pdf
[firstpage_image] =>[orig_patent_app_number] => 928285
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/928285 | Process for encapsulating a semiconductor chip, leadframe and heatsink | Aug 11, 1992 | Issued |
Array
(
[id] => 2953138
[patent_doc_number] => 05231036
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-27
[patent_title] => 'Method of using a contamination shield during the manufacture of EPROM semiconductor package windows'
[patent_app_type] => 1
[patent_app_number] => 7/924309
[patent_app_country] => US
[patent_app_date] => 1992-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 6
[patent_no_of_words] => 2143
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/231/05231036.pdf
[firstpage_image] =>[orig_patent_app_number] => 924309
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/924309 | Method of using a contamination shield during the manufacture of EPROM semiconductor package windows | Aug 2, 1992 | Issued |
Array
(
[id] => 2994206
[patent_doc_number] => 05362681
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-08
[patent_title] => 'Method for separating circuit dies from a wafer'
[patent_app_type] => 1
[patent_app_number] => 7/918665
[patent_app_country] => US
[patent_app_date] => 1992-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6418
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/362/05362681.pdf
[firstpage_image] =>[orig_patent_app_number] => 918665
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/918665 | Method for separating circuit dies from a wafer | Jul 21, 1992 | Issued |
Array
(
[id] => 2941941
[patent_doc_number] => 05254500
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-19
[patent_title] => 'Method for making an integrally molded semiconductor device heat sink'
[patent_app_type] => 1
[patent_app_number] => 7/908987
[patent_app_country] => US
[patent_app_date] => 1992-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 4091
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/254/05254500.pdf
[firstpage_image] =>[orig_patent_app_number] => 908987
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/908987 | Method for making an integrally molded semiconductor device heat sink | Jul 5, 1992 | Issued |
Array
(
[id] => 2933141
[patent_doc_number] => 05229328
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-20
[patent_title] => 'Method for bonding dielectric mounted conductors to semiconductor chip contact pads'
[patent_app_type] => 1
[patent_app_number] => 7/908429
[patent_app_country] => US
[patent_app_date] => 1992-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 3603
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/229/05229328.pdf
[firstpage_image] =>[orig_patent_app_number] => 908429
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/908429 | Method for bonding dielectric mounted conductors to semiconductor chip contact pads | Jun 29, 1992 | Issued |
| 07/900137 | METHOD OF PACKAGING A SEMICONDUCTOR DEVICE IN A PACKAGE WITH IMPROVED HEAT DISSIPATION CHARACTERISTICS | Jun 17, 1992 | Abandoned |
Array
(
[id] => 2958329
[patent_doc_number] => 05198391
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-30
[patent_title] => 'Method for bonding LLCCC-components using a leadframe'
[patent_app_type] => 1
[patent_app_number] => 7/897933
[patent_app_country] => US
[patent_app_date] => 1992-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 970
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/198/05198391.pdf
[firstpage_image] =>[orig_patent_app_number] => 897933
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/897933 | Method for bonding LLCCC-components using a leadframe | Jun 14, 1992 | Issued |
Array
(
[id] => 3091789
[patent_doc_number] => 05290732
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-01
[patent_title] => 'Process for making semiconductor electrode bumps by metal cluster ion deposition and etching'
[patent_app_type] => 1
[patent_app_number] => 7/896126
[patent_app_country] => US
[patent_app_date] => 1992-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 35
[patent_no_of_words] => 7214
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/290/05290732.pdf
[firstpage_image] =>[orig_patent_app_number] => 896126
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/896126 | Process for making semiconductor electrode bumps by metal cluster ion deposition and etching | Jun 8, 1992 | Issued |
Array
(
[id] => 3094078
[patent_doc_number] => 05298464
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-29
[patent_title] => 'Method of mounting a tape automated bonded semiconductor in a housing using a compressor'
[patent_app_type] => 1
[patent_app_number] => 7/890984
[patent_app_country] => US
[patent_app_date] => 1992-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4322
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/298/05298464.pdf
[firstpage_image] =>[orig_patent_app_number] => 890984
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/890984 | Method of mounting a tape automated bonded semiconductor in a housing using a compressor | May 28, 1992 | Issued |
| 07/890423 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME | May 28, 1992 | Abandoned |
| 07/889159 | METHOD OF FABRICATING CONTACTS FOR SOLAR CELLS | May 26, 1992 | Abandoned |
Array
(
[id] => 3091379
[patent_doc_number] => 05290710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-01
[patent_title] => 'Method for testing integrated circuits on a carrier substrate'
[patent_app_type] => 1
[patent_app_number] => 7/887995
[patent_app_country] => US
[patent_app_date] => 1992-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4699
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/290/05290710.pdf
[firstpage_image] =>[orig_patent_app_number] => 887995
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/887995 | Method for testing integrated circuits on a carrier substrate | May 21, 1992 | Issued |
| 07/886567 | POLYIMIDE PASSIVATION ON GAAS MICROWAVE MONOLITHIC INTEGRATED CIRCUIT FLIP CHIP | May 20, 1992 | Abandoned |
| 07/884719 | METHOD OF FABRICATING STACKS OF IC CHIPS BY SEGMENTING A LARGER STACK | May 14, 1992 | Abandoned |
Array
(
[id] => 2782205
[patent_doc_number] => 05164328
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-17
[patent_title] => 'Method of bump bonding and sealing an accelerometer chip onto an integrated circuit chip'
[patent_app_type] => 1
[patent_app_number] => 7/884314
[patent_app_country] => US
[patent_app_date] => 1992-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1251
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/164/05164328.pdf
[firstpage_image] =>[orig_patent_app_number] => 884314
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/884314 | Method of bump bonding and sealing an accelerometer chip onto an integrated circuit chip | May 10, 1992 | Issued |
Array
(
[id] => 2985048
[patent_doc_number] => 05266501
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-30
[patent_title] => 'Method for manufacturing a solid state image sensing device using transparent thermosetting resin layers'
[patent_app_type] => 1
[patent_app_number] => 7/879013
[patent_app_country] => US
[patent_app_date] => 1992-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2179
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/266/05266501.pdf
[firstpage_image] =>[orig_patent_app_number] => 879013
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/879013 | Method for manufacturing a solid state image sensing device using transparent thermosetting resin layers | May 5, 1992 | Issued |
| 07/878757 | OPTO-ELECTRONIC COMPONENTS | May 4, 1992 | Abandoned |
Array
(
[id] => 2960835
[patent_doc_number] => 05273938
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-28
[patent_title] => 'Method for attaching conductive traces to plural, stacked, encapsulated semiconductor die using a removable transfer film'
[patent_app_type] => 1
[patent_app_number] => 7/876315
[patent_app_country] => US
[patent_app_date] => 1992-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 4838
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/273/05273938.pdf
[firstpage_image] =>[orig_patent_app_number] => 876315
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/876315 | Method for attaching conductive traces to plural, stacked, encapsulated semiconductor die using a removable transfer film | Apr 29, 1992 | Issued |