Search

David E. Martinez

Examiner (ID: 12227, Phone: (571)272-4152 , Office: P/2181 )

Most Active Art Unit
2181
Art Unit(s)
2181, 3634, 2182
Total Applications
982
Issued Applications
835
Pending Applications
33
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16393241 [patent_doc_number] => 20200334182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => DIGITAL BUS ACTIVITY MONITOR [patent_app_type] => utility [patent_app_number] => 16/865606 [patent_app_country] => US [patent_app_date] => 2020-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/865606
Digital bus activity monitor May 3, 2020 Issued
Array ( [id] => 17202181 [patent_doc_number] => 20210342276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => DETECTING POTENTIALLY OVERLAPPING INPUT/OUTPUT QUEUES [patent_app_type] => utility [patent_app_number] => 16/863779 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16863779 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/863779
Detecting potentially overlapping input/output queues Apr 29, 2020 Issued
Array ( [id] => 16240220 [patent_doc_number] => 20200257454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => CONTROLLING ACCESS TO PREVIOUSLY-STORED LOGIC IN A RECONFIGURABLE LOGIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/863700 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16863700 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/863700
Controlling access to previously-stored logic in a reconfigurable logic device Apr 29, 2020 Issued
Array ( [id] => 16514723 [patent_doc_number] => 20200393981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => OPERATIONAL METRIC COMPUTATION FOR WORKLOAD TYPE [patent_app_type] => utility [patent_app_number] => 16/861511 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/861511
Operational metric computation for workload type Apr 28, 2020 Issued
Array ( [id] => 17309020 [patent_doc_number] => 11210130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Adaptive write acknowledgment for storage devices [patent_app_type] => utility [patent_app_number] => 16/855139 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6880 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855139 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855139
Adaptive write acknowledgment for storage devices Apr 21, 2020 Issued
Array ( [id] => 16787873 [patent_doc_number] => 10990306 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Bandwidth sharing for paired storage systems [patent_app_type] => utility [patent_app_number] => 16/855175 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 40964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855175 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855175
Bandwidth sharing for paired storage systems Apr 21, 2020 Issued
Array ( [id] => 16393231 [patent_doc_number] => 20200334172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => SIGNAL PATH BIASING IN A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/849740 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849740 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849740
Method and apparatus for signal path biasing in a memory system Apr 14, 2020 Issued
Array ( [id] => 16209069 [patent_doc_number] => 20200242059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => HyperConverged NVMF Storage-NIC Card [patent_app_type] => utility [patent_app_number] => 16/846341 [patent_app_country] => US [patent_app_date] => 2020-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846341 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846341
NVMF storage to NIC card coupling over a dedicated bus Apr 11, 2020 Issued
Array ( [id] => 16209083 [patent_doc_number] => 20200242073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => MONOLITHICALLY INTEGRATED SYSTEM ON CHIP FOR SILICON PHOTONICS [patent_app_type] => utility [patent_app_number] => 16/844633 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844633 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844633
Monolithically integrated system on chip for silicon photonics Apr 8, 2020 Issued
Array ( [id] => 17364847 [patent_doc_number] => 11231868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => System and method for performing computational storage utilizing a hardware accelerator [patent_app_type] => utility [patent_app_number] => 16/842583 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6973 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842583 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842583
System and method for performing computational storage utilizing a hardware accelerator Apr 6, 2020 Issued
Array ( [id] => 16179126 [patent_doc_number] => 20200226094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SCALABLE 2.5D INTERFACE CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/833068 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/833068
Scalable 2.5D interface circuitry Mar 26, 2020 Issued
Array ( [id] => 18286857 [patent_doc_number] => 20230102329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => MEMORY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/802681 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17802681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/802681
MEMORY CONTROL METHOD Mar 25, 2020 Abandoned
Array ( [id] => 17077715 [patent_doc_number] => 11114126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Disk drive server [patent_app_type] => utility [patent_app_number] => 16/829001 [patent_app_country] => US [patent_app_date] => 2020-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 10537 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/829001
Disk drive server Mar 24, 2020 Issued
Array ( [id] => 17332197 [patent_doc_number] => 11222664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Dummy hard disk drive [patent_app_type] => utility [patent_app_number] => 16/826230 [patent_app_country] => US [patent_app_date] => 2020-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 10537 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16826230 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/826230
Dummy hard disk drive Mar 20, 2020 Issued
Array ( [id] => 17031613 [patent_doc_number] => 11093426 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-17 [patent_title] => USB recepticle configuration and system therefor [patent_app_type] => utility [patent_app_number] => 16/825150 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4191 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825150 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/825150
USB recepticle configuration and system therefor Mar 19, 2020 Issued
Array ( [id] => 16314600 [patent_doc_number] => 20200293338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SHARED DISK DRIVE COMPONENT SYSTEM [patent_app_type] => utility [patent_app_number] => 16/820646 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820646
Shared disk drive component system Mar 15, 2020 Issued
Array ( [id] => 16788117 [patent_doc_number] => 10990550 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Custom chip to support a CPU that lacks a DisplayPort input [patent_app_type] => utility [patent_app_number] => 16/815050 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6450 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16815050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/815050
Custom chip to support a CPU that lacks a DisplayPort input Mar 10, 2020 Issued
Array ( [id] => 17136382 [patent_doc_number] => 11137935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Storage system with plurality of storage controllers communicatively coupled for determination of storage controller indentifiers [patent_app_type] => utility [patent_app_number] => 16/812586 [patent_app_country] => US [patent_app_date] => 2020-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5098 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812586 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/812586
Storage system with plurality of storage controllers communicatively coupled for determination of storage controller indentifiers Mar 8, 2020 Issued
Array ( [id] => 16346004 [patent_doc_number] => 20200310655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => STORAGE SYSTEM AND DATA RECORDING METHOD [patent_app_type] => utility [patent_app_number] => 16/810615 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810615
Storage system and compressed sensor data recording method for sensors grouped based on parameters Mar 4, 2020 Issued
Array ( [id] => 17253001 [patent_doc_number] => 11188490 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-30 [patent_title] => Systems and methods for switching a console connection between CPUs [patent_app_type] => utility [patent_app_number] => 16/809289 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809289 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809289
Systems and methods for switching a console connection between CPUs Mar 3, 2020 Issued
Menu