David E. Martinez

Array ( [id] => 15152031 [patent_doc_number] => 20190354493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => UNIVERSAL FLASH STORAGE, ELECTRONIC DEVICE CAPABLE OF CONNECTING TO A PLURALITY TYPE OF MEMORY DEVICES AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/412881 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412881 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14750849 [patent_doc_number] => 20190258598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SINGLE-CHIP CONTROL MODULE FOR AN INTEGRATED SYSTEM-ON-A-CHIP FOR SILICON PHOTONICS [patent_app_type] => utility [patent_app_number] => 16/403350 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15670495 [patent_doc_number] => 10599477 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-24 [patent_title] => Methods and apparatus for command list processing in performing parallel IO operations [patent_app_type] => utility [patent_app_number] => 16/395638 [patent_app_country] => US [patent_app_date] => 2019-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10645 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16395638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16788062 [patent_doc_number] => 10990495 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Selectively enabling features based on rules [patent_app_type] => utility [patent_app_number] => 16/384490 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16032625 [patent_doc_number] => 10678733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Apparatus for connecting non-volatile memory locally to a GPU through a local switch [patent_app_type] => utility [patent_app_number] => 16/380005 [patent_app_country] => US [patent_app_date] => 2019-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5002 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16363274 [patent_doc_number] => 20200320025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => STORAGE-BASED SLOW DRAIN DETECTION AND AUTOMATED RESOLUTION [patent_app_type] => utility [patent_app_number] => 16/374182 [patent_app_country] => US [patent_app_date] => 2019-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16374182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14629217 [patent_doc_number] => 20190227976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => DEVICES AND METHODS FOR TRANSMISSION OF EVENTS WITH A UNIFORM LATENCY ON SERIAL COMMUNICATION LINKS [patent_app_type] => utility [patent_app_number] => 16/371880 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16371880 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14629215 [patent_doc_number] => 20190227975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => DEVICES AND METHODS FOR TRANSMISSION OF EVENTS WITH A UNIFORM LATENCY ON SERIAL COMMUNICATION LINKS [patent_app_type] => utility [patent_app_number] => 16/371664 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16371664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15459291 [patent_doc_number] => 20200042470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => DATA PROCESSING SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/367974 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16367974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17287378 [patent_doc_number] => 11203920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Data stream controller with configurable barrier for join and aggregation [patent_app_type] => utility [patent_app_number] => 16/366061 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366061 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16130181 [patent_doc_number] => 10698851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Data bit width converter and system on chip thereof [patent_app_type] => utility [patent_app_number] => 16/366139 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5983 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14997899 [patent_doc_number] => 20190317907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => MEMORY MODULE THREADING WITH STAGGERED DATA TRANSFERS [patent_app_type] => utility [patent_app_number] => 16/365528 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16365528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14901619 [patent_doc_number] => 20190294575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => TECHNIQUES FOR EFFICIENTLY SYNCHRONIZING DATA TRANSMISSIONS ON A NETWORK [patent_app_type] => utility [patent_app_number] => 16/364565 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15214467 [patent_doc_number] => 20190369920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 16/353339 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14856897 [patent_doc_number] => 10417176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Monolithically integrated system on chip for silicon photonics [patent_app_type] => utility [patent_app_number] => 16/295629 [patent_app_country] => US [patent_app_date] => 2019-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 9208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15399315 [patent_doc_number] => 10540314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => System transparent retimer [patent_app_type] => utility [patent_app_number] => 16/265845 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7402 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16265845 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14688895 [patent_doc_number] => 20190243563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => STORAGE CONTROL DEVICE, STORAGE CONTROL METHOD, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/260308 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16260308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16208791 [patent_doc_number] => 20200241781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => METHOD AND SYSTEM FOR INLINE DEDUPLICATION USING ERASURE CODING [patent_app_type] => utility [patent_app_number] => 16/260734 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16260734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16291973 [patent_doc_number] => 10768822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Increasing storage capacity in heterogeneous storage arrays [patent_app_type] => utility [patent_app_number] => 16/261076 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16232475 [patent_doc_number] => 10740023 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-11 [patent_title] => System and method for dynamic application access-based mapping [patent_app_type] => utility [patent_app_number] => 16/261155 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9721 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261155 [rel_patent_id] =>[rel_patent_doc_number] =>)