David E. Martinez

Array ( [id] => 13003691 [patent_doc_number] => 10025513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Execution method and apparatus [patent_app_type] => utility [patent_app_number] => 15/446686 [patent_app_country] => US [patent_app_date] => 2017-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7553 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15446686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15609523 [patent_doc_number] => 10585824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Transmission control preventing transmission of similar commands in overlapping manner [patent_app_type] => utility [patent_app_number] => 16/079171 [patent_app_country] => US [patent_app_date] => 2017-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10924 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16079171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14009405 [patent_doc_number] => 10223161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Hardware-based inter-device resource sharing [patent_app_type] => utility [patent_app_number] => 15/432826 [patent_app_country] => US [patent_app_date] => 2017-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8505 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15432826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11938657 [patent_doc_number] => 20170242807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'MEMORY MODULE THREADING WITH STAGGERED DATA TRANSFERS' [patent_app_type] => utility [patent_app_number] => 15/428121 [patent_app_country] => US [patent_app_date] => 2017-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7002 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428121 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11606719 [patent_doc_number] => 20170124022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'MONOLITHICALLY INTEGRATED SYSTEM ON CHIP FOR SILICON PHOTONICS' [patent_app_type] => utility [patent_app_number] => 15/408280 [patent_app_country] => US [patent_app_date] => 2017-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15408280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12869047 [patent_doc_number] => 20180181524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE [patent_app_type] => utility [patent_app_number] => 15/392225 [patent_app_country] => US [patent_app_date] => 2016-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11717056 [patent_doc_number] => 20170185555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'METHOD FOR INCREASING THE COMPATIBILITY OF DISPLAYPORT' [patent_app_type] => utility [patent_app_number] => 15/391838 [patent_app_country] => US [patent_app_date] => 2016-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4861 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14265523 [patent_doc_number] => 10282325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Semiconductor device including a plurality of circuits and a bus connecting the circuits to one another, and method of operating the semiconductor device [patent_app_type] => utility [patent_app_number] => 15/390888 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14156 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11717058 [patent_doc_number] => 20170185557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/390094 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 17870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390094 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14203007 [patent_doc_number] => 10268620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Apparatus for connecting non-volatile memory locally to a GPU through a local switch [patent_app_type] => utility [patent_app_number] => 15/389747 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5002 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12869062 [patent_doc_number] => 20180181529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => RING NETWORK SYSTEM USING PERIPHERAL COMPONENT INTERCONNECT EXPRESS AND SETTING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/390344 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13186093 [patent_doc_number] => 10108567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Memory channel selection control [patent_app_type] => utility [patent_app_number] => 15/388224 [patent_app_country] => US [patent_app_date] => 2016-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6916 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15388224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13226819 [patent_doc_number] => 10127185 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-13 [patent_title] => Format agnostic data transfer circuit [patent_app_type] => utility [patent_app_number] => 15/384668 [patent_app_country] => US [patent_app_date] => 2016-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5255 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15384668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12845428 [patent_doc_number] => 20180173649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => EFFICIENT ARBITRATION FOR MEMORY ACCESSES [patent_app_type] => utility [patent_app_number] => 15/385566 [patent_app_country] => US [patent_app_date] => 2016-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15385566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11651168 [patent_doc_number] => 20170147069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'SYSTEM AND METHOD FOR ORDERING HAPTIC EFFECTS' [patent_app_type] => utility [patent_app_number] => 15/361916 [patent_app_country] => US [patent_app_date] => 2016-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11471 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15361916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11745674 [patent_doc_number] => 20170199747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'DRIVERLESS PROGRAMMABLE COMPUTER INPUT DEVICES AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 15/357802 [patent_app_country] => US [patent_app_date] => 2016-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8030 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15357802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13070489 [patent_doc_number] => 10056027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Virtualized display output ports configuration [patent_app_type] => utility [patent_app_number] => 15/356016 [patent_app_country] => US [patent_app_date] => 2016-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5039 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15356016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16502249 [patent_doc_number] => 10867642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Active random access memory [patent_app_type] => utility [patent_app_number] => 15/341372 [patent_app_country] => US [patent_app_date] => 2016-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4494 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15341372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11629681 [patent_doc_number] => 20170139871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'MULTIMEDIA COMMUNICATION APPARATUS AND CONTROL METHOD FOR MULTIMEDIA DATA TRANSMISSION OVER STANDARD CABLE' [patent_app_type] => utility [patent_app_number] => 15/293477 [patent_app_country] => US [patent_app_date] => 2016-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7412 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15293477 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12647385 [patent_doc_number] => 20180107626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => METHOD AND SYSTEM FOR HIGH PRECISION TIME SYNCHRONIZATION [patent_app_type] => utility [patent_app_number] => 15/292921 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292921 [rel_patent_id] =>[rel_patent_doc_number] =>)