| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_title] => 'Method and device for removing frequency offset'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/093408 | Method and device for removing frequency offset | Jul 18, 1993 | Issued |
| 08/093508 | METHOD AND APPARATUS FOR ENCODING DATA FOR TRANSFER OVER A COMMUNICATION CHANNEL | Jul 15, 1993 | Pending |
Array
(
[id] => 3465174
[patent_doc_number] => 05452325
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[patent_kind] => NA
[patent_issue_date] => 1995-09-19
[patent_title] => 'Averaging zero phase start for phase locked loops'
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[patent_app_number] => 8/090378
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[firstpage_image] =>[orig_patent_app_number] => 090378
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/090378 | Averaging zero phase start for phase locked loops | Jul 11, 1993 | Issued |
| 08/089002 | INTEGRATED MULTI-PORT REPEATER HAVING SHARED RESOURCES | Jul 8, 1993 | Pending |
Array
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[id] => 3115695
[patent_doc_number] => 05448598
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[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'Analog PLL clock recovery circuit and a LAN transceiver employing the same'
[patent_app_type] => 1
[patent_app_number] => 8/088008
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[patent_app_date] => 1993-07-06
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[firstpage_image] =>[orig_patent_app_number] => 088008
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/088008 | Analog PLL clock recovery circuit and a LAN transceiver employing the same | Jul 5, 1993 | Issued |
Array
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[id] => 3436589
[patent_doc_number] => 05416801
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-16
[patent_title] => 'Digital signal transmission system based on partitioning of a coded modulation with concatenated codings'
[patent_app_type] => 1
[patent_app_number] => 8/086958
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Array
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[id] => 3535745
[patent_doc_number] => 05504777
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[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Communications system using open architecture bus lines'
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[patent_app_number] => 8/084622
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/084622 | Communications system using open architecture bus lines | Jun 30, 1993 | Issued |
Array
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[id] => 3500808
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/076518 | Applications of simultaneous analog and digital communication | Jun 13, 1993 | Issued |
| 08/074108 | SYNCHRONIZED CLOCK USING A NON-PULLABLE REFERENCE OSCILLATOR | Jun 8, 1993 | Pending |
| 08/066298 | METHOD OF PROCESSING AND OPTIMIZING THE ANALOG BER FUNCTION IN A DIGITAL RADIO TRANSMISSION SYSTEM IN DIFFERENCE OF SPACE AND/OR ANGLE | May 20, 1993 | Pending |
| 08/049298 | INTERFACE UNIT FOR COMMUNICATION DEVICE | Apr 19, 1993 | Pending |
Array
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[id] => 3051135
[patent_doc_number] => 05377228
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-27
[patent_title] => 'Data repeating apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/049527
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[patent_app_date] => 1993-04-20
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[firstpage_image] =>[orig_patent_app_number] => 049527
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/049527 | Data repeating apparatus | Apr 19, 1993 | Issued |
Array
(
[id] => 3468868
[patent_doc_number] => 05473665
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Performance monitoring of DS0 channel via D4 channel bank'
[patent_app_type] => 1
[patent_app_number] => 8/027948
[patent_app_country] => US
[patent_app_date] => 1993-03-08
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[pdf_file] => patents/05/473/05473665.pdf
[firstpage_image] =>[orig_patent_app_number] => 027948
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/027948 | Performance monitoring of DS0 channel via D4 channel bank | Mar 7, 1993 | Issued |
| 08/021137 | IMAGE ANALYSIS SYSTEM | Feb 22, 1993 | Abandoned |
| 08/016968 | DATA DETECTING APPARATUS | Feb 11, 1993 | Abandoned |
Array
(
[id] => 3624634
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[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Method of video noise reduction using non-linear pre/de-emphasis'
[patent_app_type] => 1
[patent_app_number] => 7/972458
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/972458 | Method of video noise reduction using non-linear pre/de-emphasis | Feb 2, 1993 | Issued |
| 08/010107 | STATE MACHINE PHASE LOCK LOOP | Jan 27, 1993 | Abandoned |
Array
(
[id] => 3470365
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-15
[patent_title] => 'Timing extraction device and data transmission device using the timing extraction device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/009108 | Timing extraction device and data transmission device using the timing extraction device | Jan 25, 1993 | Issued |
Array
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[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'One bit differential detector with frequency offset compensation'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/004407 | Autonomous pulse train timing controls for time-mark alignment | Jan 13, 1993 | Issued |