Search

David E. Martinez

Examiner (ID: 12227, Phone: (571)272-4152 , Office: P/2181 )

Most Active Art Unit
2181
Art Unit(s)
2181, 3634, 2182
Total Applications
982
Issued Applications
835
Pending Applications
33
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18561554 [patent_doc_number] => 11726797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Secondary processor device ownership system [patent_app_type] => utility [patent_app_number] => 17/493033 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10228 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/493033
Secondary processor device ownership system Oct 3, 2021 Issued
Array ( [id] => 17358578 [patent_doc_number] => 20220019374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => PROCESSING-IN-MEMORY (PIM) SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/491954 [patent_app_country] => US [patent_app_date] => 2021-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17491954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/491954
Processing-in-memory (PIM) systems Sep 30, 2021 Issued
Array ( [id] => 20715827 [patent_doc_number] => 12631068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Ladder foot and ladder therewith [patent_app_type] => utility [patent_app_number] => 17/483568 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483568
Ladder foot and ladder therewith Sep 22, 2021 Issued
Array ( [id] => 17701532 [patent_doc_number] => 11375270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Cable, method of controlling cable, connection device, electronic device, and method of controlling electronic device [patent_app_type] => utility [patent_app_number] => 17/482738 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 97 [patent_figures_cnt] => 107 [patent_no_of_words] => 45802 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/482738
Cable, method of controlling cable, connection device, electronic device, and method of controlling electronic device Sep 22, 2021 Issued
Array ( [id] => 19610160 [patent_doc_number] => 12159035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Peripheral component interconnect express interface device and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/481503 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6923 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481503 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481503
Peripheral component interconnect express interface device and operating method thereof Sep 21, 2021 Issued
Array ( [id] => 18708766 [patent_doc_number] => 20230331352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => A MARITIME CHUTE FOR MARITIME EVACUATION [patent_app_type] => utility [patent_app_number] => 18/044489 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18044489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/044489
A MARITIME CHUTE FOR MARITIME EVACUATION Sep 14, 2021 Pending
Array ( [id] => 18637994 [patent_doc_number] => 11762594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Memory system and method of controlling thereof [patent_app_type] => utility [patent_app_number] => 17/469486 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469486 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469486
Memory system and method of controlling thereof Sep 7, 2021 Issued
Array ( [id] => 18591919 [patent_doc_number] => 11740815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Intelligent path selection and load balancing [patent_app_type] => utility [patent_app_number] => 17/461809 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 13360 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461809
Intelligent path selection and load balancing Aug 29, 2021 Issued
Array ( [id] => 18638184 [patent_doc_number] => 11762786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Low power area efficient divided clock shifter scheme for high latency designs [patent_app_type] => utility [patent_app_number] => 17/410623 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10967 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410623 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410623
Low power area efficient divided clock shifter scheme for high latency designs Aug 23, 2021 Issued
Array ( [id] => 18160030 [patent_doc_number] => 20230026622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => Tracing Activity from Multiple Components of a Device [patent_app_type] => utility [patent_app_number] => 17/445550 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445550 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445550
Tracing activity from multiple components of a device Aug 19, 2021 Issued
Array ( [id] => 18872993 [patent_doc_number] => 11860800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Kernel mapping to nodes in compute fabric [patent_app_type] => utility [patent_app_number] => 17/407486 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 24842 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407486 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407486
Kernel mapping to nodes in compute fabric Aug 19, 2021 Issued
Array ( [id] => 17884959 [patent_doc_number] => 20220300436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR STORAGE DEVICE, MEMORY CONTROLLER, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/403582 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17403582 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/403582
Communication in accordance with multiple interface protocols in semiconductor storage device Aug 15, 2021 Issued
Array ( [id] => 17246811 [patent_doc_number] => 20210366556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => ADJUSTMENT OF A VOLTAGE CORRESPONDING TO A PROGRAMMING DISTRIBUTION BASED ON A PROGRAM TARGETING RULE [patent_app_type] => utility [patent_app_number] => 17/395067 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395067
Adjustment of a voltage corresponding to a programming distribution based on a program targeting rule Aug 4, 2021 Issued
Array ( [id] => 17387911 [patent_doc_number] => 20220035763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => Chip [patent_app_type] => utility [patent_app_number] => 17/390365 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/390365
Updatable wireless local area network (WLAN) chip Jul 29, 2021 Issued
Array ( [id] => 18506339 [patent_doc_number] => 11704154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => High-speed broadside communications and control system [patent_app_type] => utility [patent_app_number] => 17/359749 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 15355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359749
High-speed broadside communications and control system Jun 27, 2021 Issued
Array ( [id] => 17098771 [patent_doc_number] => 20210286562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => WRITE METHOD FOR RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 17/337003 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337003 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337003
Write method for resistive memory Jun 1, 2021 Issued
Array ( [id] => 18203974 [patent_doc_number] => 11586365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Applying a rate limit across a plurality of storage systems [patent_app_type] => utility [patent_app_number] => 17/232668 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 40977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17232668 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/232668
Applying a rate limit across a plurality of storage systems Apr 15, 2021 Issued
Array ( [id] => 18087167 [patent_doc_number] => 11537299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Local memory use for perspective transform engine [patent_app_type] => utility [patent_app_number] => 17/233361 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5829 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233361 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/233361
Local memory use for perspective transform engine Apr 15, 2021 Issued
Array ( [id] => 18330795 [patent_doc_number] => 11636037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Methods and apparatuses involving radar system data paths [patent_app_type] => utility [patent_app_number] => 17/232670 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4013 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17232670 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/232670
Methods and apparatuses involving radar system data paths Apr 15, 2021 Issued
Array ( [id] => 18291351 [patent_doc_number] => 11620221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Data flow monitoring in a multiple core system [patent_app_type] => utility [patent_app_number] => 17/301526 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5567 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301526
Data flow monitoring in a multiple core system Apr 5, 2021 Issued
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