Search

David G. Muller

Examiner (ID: 18937, Phone: (571)272-4721 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2914, 2974
Total Applications
3653
Issued Applications
3583
Pending Applications
13
Abandoned Applications
66

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11057309 [patent_doc_number] => 20160254271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/151846 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5689 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151846 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151846
Non-volatile semiconductor memory device and manufacturing method thereof May 10, 2016 Issued
Array ( [id] => 13019175 [patent_doc_number] => 10032705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/149141 [patent_app_country] => US [patent_app_date] => 2016-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 39 [patent_no_of_words] => 10495 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149141 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149141
Semiconductor package and manufacturing method thereof May 7, 2016 Issued
Array ( [id] => 11746709 [patent_doc_number] => 20170200782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'CAPACITOR OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/149054 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149054 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149054
CAPACITOR OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME May 5, 2016 Abandoned
Array ( [id] => 12033802 [patent_doc_number] => 20170323902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'METHOD, APPARATUS, AND SYSTEM FOR IMPROVED CELL DESIGN HAVING UNIDIRECTIONAL METAL LAYOUT ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 15/149066 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149066 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149066
METHOD, APPARATUS, AND SYSTEM FOR IMPROVED CELL DESIGN HAVING UNIDIRECTIONAL METAL LAYOUT ARCHITECTURE May 5, 2016 Abandoned
Array ( [id] => 11746613 [patent_doc_number] => 20170200686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/149038 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149038 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149038
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF May 5, 2016 Abandoned
Array ( [id] => 12175040 [patent_doc_number] => 09893188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Semiconductor structure with template for transition metal dichalcogenides channel material growth' [patent_app_type] => utility [patent_app_number] => 15/146125 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2296 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146125 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146125
Semiconductor structure with template for transition metal dichalcogenides channel material growth May 3, 2016 Issued
Array ( [id] => 11315476 [patent_doc_number] => 20160351586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/146731 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6655 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146731 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146731
Display device May 3, 2016 Issued
Array ( [id] => 12147854 [patent_doc_number] => 09882116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Piezoelectric devices and methods for their preparation and use' [patent_app_type] => utility [patent_app_number] => 15/144585 [patent_app_country] => US [patent_app_date] => 2016-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4560 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144585 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144585
Piezoelectric devices and methods for their preparation and use May 1, 2016 Issued
Array ( [id] => 12650121 [patent_doc_number] => 20180108538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => SILICON EPITAXIAL WAFER AND METHOD OF PRODUCING SAME [patent_app_type] => utility [patent_app_number] => 15/564952 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15564952 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/564952
Silicon epitaxial wafer and method of producing same Apr 20, 2016 Issued
Array ( [id] => 12355650 [patent_doc_number] => 09954063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Stacked planar double-gate lamellar field-effect transistor [patent_app_type] => utility [patent_app_number] => 15/134190 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 9341 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134190 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134190
Stacked planar double-gate lamellar field-effect transistor Apr 19, 2016 Issued
Array ( [id] => 12355647 [patent_doc_number] => 09954062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Stacked planar double-gate lamellar field-effect transistor [patent_app_type] => utility [patent_app_number] => 15/134174 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 9341 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 332 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134174 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134174
Stacked planar double-gate lamellar field-effect transistor Apr 19, 2016 Issued
Array ( [id] => 11036348 [patent_doc_number] => 20160233304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'STACKED PLANAR DOUBLE-GATE LAMELLAR FIELD-EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/134155 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9645 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134155 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134155
Stacked planar double-gate lamellar field-effect transistor Apr 19, 2016 Issued
Array ( [id] => 11353805 [patent_doc_number] => 20160372545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'METHOD TO FORM SOI FINS ON A BULK SUBSTRATE WITH SUSPENDED ANCHORING' [patent_app_type] => utility [patent_app_number] => 15/130676 [patent_app_country] => US [patent_app_date] => 2016-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130676 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/130676
Method to form SOI fins on a bulk substrate with suspended anchoring Apr 14, 2016 Issued
Array ( [id] => 11623436 [patent_doc_number] => 20170133625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'Packaging Assembly and Packaging Method Thereof, and OLED Apparatus' [patent_app_type] => utility [patent_app_number] => 15/321856 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15321856 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/321856
Packaging Assembly and Packaging Method Thereof, and OLED Apparatus Apr 13, 2016 Abandoned
Array ( [id] => 11883832 [patent_doc_number] => 09755016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Integration process to form microelectronic or micromechanical structures' [patent_app_type] => utility [patent_app_number] => 15/088592 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 35 [patent_no_of_words] => 5850 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088592 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088592
Integration process to form microelectronic or micromechanical structures Mar 31, 2016 Issued
Array ( [id] => 12668929 [patent_doc_number] => 20180114809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => RANGE SENSOR AND SOLID-STATE IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 15/562965 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15562965 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/562965
Range sensor and solid-state imaging device Mar 30, 2016 Issued
Array ( [id] => 11313334 [patent_doc_number] => 20160349445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DIODE CHIP AND LIGHT EMITTING DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/078488 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15078488 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/078488
Semiconductor light emitting diode chip and light emitting device having the same Mar 22, 2016 Issued
Array ( [id] => 12335469 [patent_doc_number] => 09947824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-17 [patent_title] => Solar cell employing nanocrystalline superlattice material and amorphous structure and method of constructing the same [patent_app_type] => utility [patent_app_number] => 15/072519 [patent_app_country] => US [patent_app_date] => 2016-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3311 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15072519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/072519
Solar cell employing nanocrystalline superlattice material and amorphous structure and method of constructing the same Mar 16, 2016 Issued
Array ( [id] => 11071491 [patent_doc_number] => 20160268455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'LASER PROCESSED BACK CONTACT HETEROJUNCTION SOLAR CELLS' [patent_app_type] => utility [patent_app_number] => 15/068900 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11949 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15068900 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/068900
Laser processed back contact heterojunction solar cells Mar 13, 2016 Issued
Array ( [id] => 11817900 [patent_doc_number] => 09721857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 15/067173 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 16398 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067173 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067173
Semiconductor device and manufacturing method thereof Mar 9, 2016 Issued
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