
David H. Malzahn
Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786 |
| Total Applications | 3174 |
| Issued Applications | 2743 |
| Pending Applications | 60 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3498712
[patent_doc_number] => 05471413
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-28
[patent_title] => 'Fast adder chain'
[patent_app_type] => 1
[patent_app_number] => 8/066567
[patent_app_country] => US
[patent_app_date] => 1993-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2778
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 19
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/471/05471413.pdf
[firstpage_image] =>[orig_patent_app_number] => 066567
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/066567 | Fast adder chain | May 24, 1993 | Issued |
Array
(
[id] => 3455390
[patent_doc_number] => 05420808
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-30
[patent_title] => 'Circuitry and method for reducing power consumption within an electronic circuit'
[patent_app_type] => 1
[patent_app_number] => 8/061397
[patent_app_country] => US
[patent_app_date] => 1993-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6616
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/420/05420808.pdf
[firstpage_image] =>[orig_patent_app_number] => 061397
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/061397 | Circuitry and method for reducing power consumption within an electronic circuit | May 12, 1993 | Issued |
Array
(
[id] => 3432774
[patent_doc_number] => 05422836
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-06
[patent_title] => 'Circuit arrangement for calculating matrix operations in signal processing'
[patent_app_type] => 1
[patent_app_number] => 8/050103
[patent_app_country] => US
[patent_app_date] => 1993-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7242
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/422/05422836.pdf
[firstpage_image] =>[orig_patent_app_number] => 050103
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/050103 | Circuit arrangement for calculating matrix operations in signal processing | May 6, 1993 | Issued |
Array
(
[id] => 3130845
[patent_doc_number] => 05381380
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'Divide circuit having high-speed operating capability'
[patent_app_type] => 1
[patent_app_number] => 8/057973
[patent_app_country] => US
[patent_app_date] => 1993-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 42
[patent_no_of_words] => 6449
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/381/05381380.pdf
[firstpage_image] =>[orig_patent_app_number] => 057973
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/057973 | Divide circuit having high-speed operating capability | May 6, 1993 | Issued |
Array
(
[id] => 3454014
[patent_doc_number] => 05388062
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-07
[patent_title] => 'Reconfigurable programmable digital filter architecture useful in communication receiver'
[patent_app_type] => 1
[patent_app_number] => 8/058903
[patent_app_country] => US
[patent_app_date] => 1993-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 28
[patent_no_of_words] => 6197
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/388/05388062.pdf
[firstpage_image] =>[orig_patent_app_number] => 058903
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/058903 | Reconfigurable programmable digital filter architecture useful in communication receiver | May 5, 1993 | Issued |
Array
(
[id] => 3107812
[patent_doc_number] => 05319585
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-07
[patent_title] => 'High resolution filtering using low resolution processors'
[patent_app_type] => 1
[patent_app_number] => 8/054370
[patent_app_country] => US
[patent_app_date] => 1993-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4414
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/319/05319585.pdf
[firstpage_image] =>[orig_patent_app_number] => 054370
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/054370 | High resolution filtering using low resolution processors | Apr 27, 1993 | Issued |
| 08/048873 | PORTABLE WORK STATION AND DATA COLLECTION TERMINAL INCLUDING SWITCHABLE MULTI PURPOSE TOUCH SCREEN DISPLAY | Apr 15, 1993 | Pending |
Array
(
[id] => 2987148
[patent_doc_number] => 05257217
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-26
[patent_title] => 'Area-efficient multiplier for use in an integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/046716
[patent_app_country] => US
[patent_app_date] => 1993-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2886
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 396
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/257/05257217.pdf
[firstpage_image] =>[orig_patent_app_number] => 046716
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/046716 | Area-efficient multiplier for use in an integrated circuit | Apr 15, 1993 | Issued |
Array
(
[id] => 3489489
[patent_doc_number] => 05400272
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-21
[patent_title] => 'Diagonal propagation digital multiplier'
[patent_app_type] => 1
[patent_app_number] => 8/045627
[patent_app_country] => US
[patent_app_date] => 1993-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3320
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/400/05400272.pdf
[firstpage_image] =>[orig_patent_app_number] => 045627
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/045627 | Diagonal propagation digital multiplier | Apr 8, 1993 | Issued |
Array
(
[id] => 3018574
[patent_doc_number] => 05355328
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-11
[patent_title] => 'Resampling apparatus suitable for resizing a video image'
[patent_app_type] => 1
[patent_app_number] => 8/033503
[patent_app_country] => US
[patent_app_date] => 1993-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 14859
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/355/05355328.pdf
[firstpage_image] =>[orig_patent_app_number] => 033503
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/033503 | Resampling apparatus suitable for resizing a video image | Mar 17, 1993 | Issued |
Array
(
[id] => 3013927
[patent_doc_number] => 05375077
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-20
[patent_title] => 'Digital signal processor having reduced bus pre-charging operations'
[patent_app_type] => 1
[patent_app_number] => 8/031503
[patent_app_country] => US
[patent_app_date] => 1993-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3577
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/375/05375077.pdf
[firstpage_image] =>[orig_patent_app_number] => 031503
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/031503 | Digital signal processor having reduced bus pre-charging operations | Mar 14, 1993 | Issued |
Array
(
[id] => 2904285
[patent_doc_number] => 05270962
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-14
[patent_title] => 'Multiply and divide circuit'
[patent_app_type] => 1
[patent_app_number] => 8/031026
[patent_app_country] => US
[patent_app_date] => 1993-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 7066
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 482
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/270/05270962.pdf
[firstpage_image] =>[orig_patent_app_number] => 031026
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/031026 | Multiply and divide circuit | Mar 10, 1993 | Issued |
Array
(
[id] => 3130621
[patent_doc_number] => 05384722
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-24
[patent_title] => 'Apparatus and method for determining the Manhattan distance between two points'
[patent_app_type] => 1
[patent_app_number] => 8/028823
[patent_app_country] => US
[patent_app_date] => 1993-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 11498
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 603
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/384/05384722.pdf
[firstpage_image] =>[orig_patent_app_number] => 028823
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/028823 | Apparatus and method for determining the Manhattan distance between two points | Mar 9, 1993 | Issued |
Array
(
[id] => 3031942
[patent_doc_number] => 05289394
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-22
[patent_title] => 'Pocket computer for word processing'
[patent_app_type] => 1
[patent_app_number] => 8/029948
[patent_app_country] => US
[patent_app_date] => 1993-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4188
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/289/05289394.pdf
[firstpage_image] =>[orig_patent_app_number] => 029948
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/029948 | Pocket computer for word processing | Mar 8, 1993 | Issued |
Array
(
[id] => 3020523
[patent_doc_number] => 05333116
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-26
[patent_title] => 'Combination laptop and pad computer'
[patent_app_type] => 1
[patent_app_number] => 8/025900
[patent_app_country] => US
[patent_app_date] => 1993-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3349
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/333/05333116.pdf
[firstpage_image] =>[orig_patent_app_number] => 025900
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/025900 | Combination laptop and pad computer | Mar 2, 1993 | Issued |
Array
(
[id] => 3130388
[patent_doc_number] => 05381356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'Cascade digital filters for realizing a transfer function obtained by cascade-connecting moving average filters'
[patent_app_type] => 1
[patent_app_number] => 8/027247
[patent_app_country] => US
[patent_app_date] => 1993-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2133
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/381/05381356.pdf
[firstpage_image] =>[orig_patent_app_number] => 027247
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/027247 | Cascade digital filters for realizing a transfer function obtained by cascade-connecting moving average filters | Mar 1, 1993 | Issued |
Array
(
[id] => 3421202
[patent_doc_number] => 05412586
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-02
[patent_title] => 'Method and system for interfacing a computer processor with a calculator keyboard and calculator'
[patent_app_type] => 1
[patent_app_number] => 8/024073
[patent_app_country] => US
[patent_app_date] => 1993-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4845
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/412/05412586.pdf
[firstpage_image] =>[orig_patent_app_number] => 024073
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/024073 | Method and system for interfacing a computer processor with a calculator keyboard and calculator | Feb 28, 1993 | Issued |
Array
(
[id] => 3125468
[patent_doc_number] => 05410497
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Portable computer having two display units'
[patent_app_type] => 1
[patent_app_number] => 8/022277
[patent_app_country] => US
[patent_app_date] => 1993-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3882
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410497.pdf
[firstpage_image] =>[orig_patent_app_number] => 022277
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/022277 | Portable computer having two display units | Feb 24, 1993 | Issued |
Array
(
[id] => 3046963
[patent_doc_number] => 05301138
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-05
[patent_title] => 'Device and method for evaluating logarithms'
[patent_app_type] => 1
[patent_app_number] => 8/019988
[patent_app_country] => US
[patent_app_date] => 1993-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 3284
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/301/05301138.pdf
[firstpage_image] =>[orig_patent_app_number] => 019988
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/019988 | Device and method for evaluating logarithms | Feb 16, 1993 | Issued |
Array
(
[id] => 3049294
[patent_doc_number] => 05377135
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-27
[patent_title] => 'High cardinal number type non-restoring divider reducing delay time for adding two numbers'
[patent_app_type] => 1
[patent_app_number] => 7/983597
[patent_app_country] => US
[patent_app_date] => 1993-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 6579
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/377/05377135.pdf
[firstpage_image] =>[orig_patent_app_number] => 983597
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/983597 | High cardinal number type non-restoring divider reducing delay time for adding two numbers | Feb 4, 1993 | Issued |