Search

David H. Malzahn

Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786
Total Applications
3174
Issued Applications
2743
Pending Applications
60
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3430480 [patent_doc_number] => 05390134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-14 [patent_title] => 'System and method for reducing latency in a floating point processor' [patent_app_type] => 1 [patent_app_number] => 8/011447 [patent_app_country] => US [patent_app_date] => 1993-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4607 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/390/05390134.pdf [firstpage_image] =>[orig_patent_app_number] => 011447 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/011447
System and method for reducing latency in a floating point processor Jan 28, 1993 Issued
Array ( [id] => 3049224 [patent_doc_number] => 05377130 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Method and apparatus for solving terms of a numerical sequence' [patent_app_type] => 1 [patent_app_number] => 8/009163 [patent_app_country] => US [patent_app_date] => 1993-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377130.pdf [firstpage_image] =>[orig_patent_app_number] => 009163 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/009163
Method and apparatus for solving terms of a numerical sequence Jan 25, 1993 Issued
08/008451 METHOD AND APPARATUS FOR ENHANCING FREQUENCY DOMAIN ANALYSIS Jan 21, 1993 Abandoned
Array ( [id] => 3059530 [patent_doc_number] => 05305246 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-19 [patent_title] => 'Device and method for evaluating inverse trigonometric functions' [patent_app_type] => 1 [patent_app_number] => 8/005853 [patent_app_country] => US [patent_app_date] => 1993-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2251 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/305/05305246.pdf [firstpage_image] =>[orig_patent_app_number] => 005853 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/005853
Device and method for evaluating inverse trigonometric functions Jan 14, 1993 Issued
08/002981 EXTENDED NUMERICAL KEYBOARD WITH STRUCTURED DATA-ENTRY CAPABILITY Jan 10, 1993 Abandoned
Array ( [id] => 3049240 [patent_doc_number] => 05377131 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Digital amplitude estimator' [patent_app_type] => 1 [patent_app_number] => 7/999047 [patent_app_country] => US [patent_app_date] => 1992-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3215 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377131.pdf [firstpage_image] =>[orig_patent_app_number] => 999047 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/999047
Digital amplitude estimator Dec 30, 1992 Issued
Array ( [id] => 3012440 [patent_doc_number] => 05371696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-06 [patent_title] => 'Computational structures for the fast Fourier transform analyzers' [patent_app_type] => 1 [patent_app_number] => 7/996561 [patent_app_country] => US [patent_app_date] => 1992-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7063 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/371/05371696.pdf [firstpage_image] =>[orig_patent_app_number] => 996561 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/996561
Computational structures for the fast Fourier transform analyzers Dec 23, 1992 Issued
Array ( [id] => 3013995 [patent_doc_number] => 05375080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Performing arithmetic on composite operands to obtain a binary outcome for each multi-bit component' [patent_app_type] => 1 [patent_app_number] => 7/993213 [patent_app_country] => US [patent_app_date] => 1992-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9716 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/375/05375080.pdf [firstpage_image] =>[orig_patent_app_number] => 993213 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/993213
Performing arithmetic on composite operands to obtain a binary outcome for each multi-bit component Dec 17, 1992 Issued
Array ( [id] => 3056176 [patent_doc_number] => 05335194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Sample rate converter' [patent_app_type] => 1 [patent_app_number] => 7/992433 [patent_app_country] => US [patent_app_date] => 1992-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3649 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/335/05335194.pdf [firstpage_image] =>[orig_patent_app_number] => 992433 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/992433
Sample rate converter Dec 16, 1992 Issued
07/990137 HIGH-SPEED BARREL SHIFTER Dec 13, 1992 Abandoned
Array ( [id] => 3096101 [patent_doc_number] => 05285401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Method and apparatus for converting scanning values of an input scanning sequence' [patent_app_type] => 1 [patent_app_number] => 7/989890 [patent_app_country] => US [patent_app_date] => 1992-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5085 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285401.pdf [firstpage_image] =>[orig_patent_app_number] => 989890 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/989890
Method and apparatus for converting scanning values of an input scanning sequence Dec 9, 1992 Issued
Array ( [id] => 3124537 [patent_doc_number] => 05396444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Terminator keys having reciprocal exponents in a data processing system' [patent_app_type] => 1 [patent_app_number] => 7/988378 [patent_app_country] => US [patent_app_date] => 1992-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 477 [patent_figures_cnt] => 515 [patent_no_of_words] => 13607 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396444.pdf [firstpage_image] =>[orig_patent_app_number] => 988378 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/988378
Terminator keys having reciprocal exponents in a data processing system Dec 7, 1992 Issued
Array ( [id] => 3055295 [patent_doc_number] => 05287298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Oscillation control apparatus for a portable battery-driven terminal' [patent_app_type] => 1 [patent_app_number] => 7/985521 [patent_app_country] => US [patent_app_date] => 1992-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1185 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287298.pdf [firstpage_image] =>[orig_patent_app_number] => 985521 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/985521
Oscillation control apparatus for a portable battery-driven terminal Dec 1, 1992 Issued
Array ( [id] => 3090237 [patent_doc_number] => 05321641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'Pseudo random pattern generation circuit' [patent_app_type] => 1 [patent_app_number] => 7/982642 [patent_app_country] => US [patent_app_date] => 1992-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4616 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321641.pdf [firstpage_image] =>[orig_patent_app_number] => 982642 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982642
Pseudo random pattern generation circuit Nov 30, 1992 Issued
Array ( [id] => 3079848 [patent_doc_number] => 05361220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-01 [patent_title] => 'Discrete cosine transformation with reduced components' [patent_app_type] => 1 [patent_app_number] => 7/982623 [patent_app_country] => US [patent_app_date] => 1992-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 12437 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/361/05361220.pdf [firstpage_image] =>[orig_patent_app_number] => 982623 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982623
Discrete cosine transformation with reduced components Nov 26, 1992 Issued
Array ( [id] => 3090217 [patent_doc_number] => 05321640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'Priority encoder and method of operation' [patent_app_type] => 1 [patent_app_number] => 7/982521 [patent_app_country] => US [patent_app_date] => 1992-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4454 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321640.pdf [firstpage_image] =>[orig_patent_app_number] => 982521 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982521
Priority encoder and method of operation Nov 26, 1992 Issued
Array ( [id] => 2904246 [patent_doc_number] => 05272662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-21 [patent_title] => 'Carry multiplexed adder' [patent_app_type] => 1 [patent_app_number] => 7/982250 [patent_app_country] => US [patent_app_date] => 1992-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 7070 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/272/05272662.pdf [firstpage_image] =>[orig_patent_app_number] => 982250 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982250
Carry multiplexed adder Nov 24, 1992 Issued
Array ( [id] => 3039253 [patent_doc_number] => 05349545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-20 [patent_title] => 'Arithmetic logic unit dequantization' [patent_app_type] => 1 [patent_app_number] => 7/981322 [patent_app_country] => US [patent_app_date] => 1992-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2716 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/349/05349545.pdf [firstpage_image] =>[orig_patent_app_number] => 981322 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/981322
Arithmetic logic unit dequantization Nov 23, 1992 Issued
Array ( [id] => 3082196 [patent_doc_number] => 05337265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-09 [patent_title] => 'Apparatus for executing add/sub operations between IEEE standard floating-point numbers' [patent_app_type] => 1 [patent_app_number] => 7/981031 [patent_app_country] => US [patent_app_date] => 1992-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5189 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/337/05337265.pdf [firstpage_image] =>[orig_patent_app_number] => 981031 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/981031
Apparatus for executing add/sub operations between IEEE standard floating-point numbers Nov 23, 1992 Issued
Array ( [id] => 3020599 [patent_doc_number] => 05333120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'Binary two\'s complement arithmetic circuit' [patent_app_type] => 1 [patent_app_number] => 7/977652 [patent_app_country] => US [patent_app_date] => 1992-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4723 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/333/05333120.pdf [firstpage_image] =>[orig_patent_app_number] => 977652 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/977652
Binary two's complement arithmetic circuit Nov 16, 1992 Issued
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