| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2853919
[patent_doc_number] => 05138570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-11
[patent_title] => 'Multiplier signed and unsigned overflow flags'
[patent_app_type] => 1
[patent_app_number] => 7/585443
[patent_app_country] => US
[patent_app_date] => 1990-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 4366
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/138/05138570.pdf
[firstpage_image] =>[orig_patent_app_number] => 585443
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/585443 | Multiplier signed and unsigned overflow flags | Sep 19, 1990 | Issued |
Array
(
[id] => 2734515
[patent_doc_number] => 05058046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-15
[patent_title] => 'Cursor selected keyboard keys displayed on the computer screen for entering alphanumeric characters and instructions, particularly for creating computer aided design and drafting patterns'
[patent_app_type] => 1
[patent_app_number] => 7/598010
[patent_app_country] => US
[patent_app_date] => 1990-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3871
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 347
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/058/05058046.pdf
[firstpage_image] =>[orig_patent_app_number] => 598010
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/598010 | Cursor selected keyboard keys displayed on the computer screen for entering alphanumeric characters and instructions, particularly for creating computer aided design and drafting patterns | Sep 19, 1990 | Issued |
Array
(
[id] => 2996417
[patent_doc_number] => 05212662
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-18
[patent_title] => 'Floating point arithmetic two cycle data flow'
[patent_app_type] => 1
[patent_app_number] => 7/580892
[patent_app_country] => US
[patent_app_date] => 1990-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 2063
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/212/05212662.pdf
[firstpage_image] =>[orig_patent_app_number] => 580892
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/580892 | Floating point arithmetic two cycle data flow | Sep 10, 1990 | Issued |
Array
(
[id] => 2721914
[patent_doc_number] => 05010510
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-23
[patent_title] => 'Multiplying unit circuit'
[patent_app_type] => 1
[patent_app_number] => 7/579343
[patent_app_country] => US
[patent_app_date] => 1990-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4755
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/010/05010510.pdf
[firstpage_image] =>[orig_patent_app_number] => 579343
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/579343 | Multiplying unit circuit | Sep 6, 1990 | Issued |
Array
(
[id] => 2944490
[patent_doc_number] => 05197022
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-23
[patent_title] => 'Overflow detection calculator and method of overflow determination'
[patent_app_type] => 1
[patent_app_number] => 7/574733
[patent_app_country] => US
[patent_app_date] => 1990-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2335
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/197/05197022.pdf
[firstpage_image] =>[orig_patent_app_number] => 574733
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/574733 | Overflow detection calculator and method of overflow determination | Aug 29, 1990 | Issued |
Array
(
[id] => 2879921
[patent_doc_number] => 05153850
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-06
[patent_title] => 'Method and apparatus for modifying two\'s complement multiplier to perform unsigned magnitude multiplication'
[patent_app_type] => 1
[patent_app_number] => 7/572743
[patent_app_country] => US
[patent_app_date] => 1990-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3636
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/153/05153850.pdf
[firstpage_image] =>[orig_patent_app_number] => 572743
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/572743 | Method and apparatus for modifying two's complement multiplier to perform unsigned magnitude multiplication | Aug 23, 1990 | Issued |
Array
(
[id] => 2859232
[patent_doc_number] => 05105376
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-14
[patent_title] => 'Linear feedback shift registers'
[patent_app_type] => 1
[patent_app_number] => 7/564913
[patent_app_country] => US
[patent_app_date] => 1990-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 4244
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/105/05105376.pdf
[firstpage_image] =>[orig_patent_app_number] => 564913
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/564913 | Linear feedback shift registers | Aug 7, 1990 | Issued |
| 07/563886 | METHOD AND APPARATUS FOR PERFORMING FLOATING POINT DIVISION | Aug 5, 1990 | Abandoned |
Array
(
[id] => 2864748
[patent_doc_number] => 05113361
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-12
[patent_title] => 'Sin/cos generator implementation'
[patent_app_type] => 1
[patent_app_number] => 7/561821
[patent_app_country] => US
[patent_app_date] => 1990-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4087
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/113/05113361.pdf
[firstpage_image] =>[orig_patent_app_number] => 561821
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/561821 | Sin/cos generator implementation | Aug 1, 1990 | Issued |
Array
(
[id] => 2800575
[patent_doc_number] => 05136530
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-04
[patent_title] => 'Ultrafast digital optical signal processing using a Venn diagram based spatial encoding technique'
[patent_app_type] => 1
[patent_app_number] => 7/559122
[patent_app_country] => US
[patent_app_date] => 1990-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4027
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/136/05136530.pdf
[firstpage_image] =>[orig_patent_app_number] => 559122
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/559122 | Ultrafast digital optical signal processing using a Venn diagram based spatial encoding technique | Jul 25, 1990 | Issued |
| 07/555321 | DEVICE AND METHOD FOR EVALUATING LOGARITHMS | Jul 18, 1990 | Abandoned |
| 07/555324 | DEVICE AND METHOD FOR EVALUATING INVERSE TRIGONOMETRIC FUNCTIONS | Jul 18, 1990 | Abandoned |
Array
(
[id] => 2870306
[patent_doc_number] => 05166899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-24
[patent_title] => 'Lookahead adder'
[patent_app_type] => 1
[patent_app_number] => 7/554612
[patent_app_country] => US
[patent_app_date] => 1990-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 22
[patent_no_of_words] => 5727
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 325
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/166/05166899.pdf
[firstpage_image] =>[orig_patent_app_number] => 554612
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/554612 | Lookahead adder | Jul 17, 1990 | Issued |
Array
(
[id] => 2863638
[patent_doc_number] => 05126962
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-30
[patent_title] => 'Discrete cosine transform processing system'
[patent_app_type] => 1
[patent_app_number] => 7/551871
[patent_app_country] => US
[patent_app_date] => 1990-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5148
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/126/05126962.pdf
[firstpage_image] =>[orig_patent_app_number] => 551871
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/551871 | Discrete cosine transform processing system | Jul 10, 1990 | Issued |
Array
(
[id] => 2879938
[patent_doc_number] => 05153851
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-06
[patent_title] => 'Method and arrangement of determining approximated reciprocal of binary normalized fraction of divisor'
[patent_app_type] => 1
[patent_app_number] => 7/551094
[patent_app_country] => US
[patent_app_date] => 1990-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4584
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/153/05153851.pdf
[firstpage_image] =>[orig_patent_app_number] => 551094
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/551094 | Method and arrangement of determining approximated reciprocal of binary normalized fraction of divisor | Jul 10, 1990 | Issued |
Array
(
[id] => 2836146
[patent_doc_number] => 05117378
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-26
[patent_title] => 'Laptop computer with detachable interface card'
[patent_app_type] => 1
[patent_app_number] => 7/551143
[patent_app_country] => US
[patent_app_date] => 1990-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 1001
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/117/05117378.pdf
[firstpage_image] =>[orig_patent_app_number] => 551143
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/551143 | Laptop computer with detachable interface card | Jul 10, 1990 | Issued |
Array
(
[id] => 2877483
[patent_doc_number] => 05097433
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-17
[patent_title] => 'Stack filter with one stage per bit'
[patent_app_type] => 1
[patent_app_number] => 7/551112
[patent_app_country] => US
[patent_app_date] => 1990-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5109
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 676
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/097/05097433.pdf
[firstpage_image] =>[orig_patent_app_number] => 551112
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/551112 | Stack filter with one stage per bit | Jul 10, 1990 | Issued |
Array
(
[id] => 2820036
[patent_doc_number] => 05086405
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-04
[patent_title] => 'Floating point adder circuit using neural network'
[patent_app_type] => 1
[patent_app_number] => 7/550450
[patent_app_country] => US
[patent_app_date] => 1990-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3908
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 425
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/086/05086405.pdf
[firstpage_image] =>[orig_patent_app_number] => 550450
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/550450 | Floating point adder circuit using neural network | Jul 9, 1990 | Issued |
Array
(
[id] => 2796876
[patent_doc_number] => 05155699
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-13
[patent_title] => 'Divider using neural network'
[patent_app_type] => 1
[patent_app_number] => 7/550503
[patent_app_country] => US
[patent_app_date] => 1990-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2690
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 358
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/155/05155699.pdf
[firstpage_image] =>[orig_patent_app_number] => 550503
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/550503 | Divider using neural network | Jul 9, 1990 | Issued |
Array
(
[id] => 2797145
[patent_doc_number] => 05130944
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-14
[patent_title] => 'Divider circuit adopting a neural network architecture to increase division processing speed and reduce hardware components'
[patent_app_type] => 1
[patent_app_number] => 7/549942
[patent_app_country] => US
[patent_app_date] => 1990-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 1997
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 378
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/130/05130944.pdf
[firstpage_image] =>[orig_patent_app_number] => 549942
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/549942 | Divider circuit adopting a neural network architecture to increase division processing speed and reduce hardware components | Jul 8, 1990 | Issued |