Search

David H. Malzahn

Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786
Total Applications
3174
Issued Applications
2743
Pending Applications
60
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2572436 [patent_doc_number] => 04835723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-30 [patent_title] => 'Phase coordinated multistage digital filter' [patent_app_type] => 1 [patent_app_number] => 7/034463 [patent_app_country] => US [patent_app_date] => 1987-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 9166 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/835/04835723.pdf [firstpage_image] =>[orig_patent_app_number] => 034463 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/034463
Phase coordinated multistage digital filter Apr 2, 1987 Issued
Array ( [id] => 2527916 [patent_doc_number] => 04864524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-05 [patent_title] => 'Combinatorial logic-based optical computing method and apparatus' [patent_app_type] => 1 [patent_app_number] => 7/031431 [patent_app_country] => US [patent_app_date] => 1987-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 6875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/864/04864524.pdf [firstpage_image] =>[orig_patent_app_number] => 031431 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/031431
Combinatorial logic-based optical computing method and apparatus Mar 26, 1987 Issued
Array ( [id] => 2451227 [patent_doc_number] => 04779220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-10-18 [patent_title] => 'Floating-point data rounding and normalizing circuit' [patent_app_type] => 1 [patent_app_number] => 7/031062 [patent_app_country] => US [patent_app_date] => 1987-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3368 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/779/04779220.pdf [firstpage_image] =>[orig_patent_app_number] => 031062 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/031062
Floating-point data rounding and normalizing circuit Mar 26, 1987 Issued
Array ( [id] => 2455783 [patent_doc_number] => 04791598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-13 [patent_title] => 'Two-dimensional discrete cosine transform processor' [patent_app_type] => 1 [patent_app_number] => 7/029761 [patent_app_country] => US [patent_app_date] => 1987-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6916 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/791/04791598.pdf [firstpage_image] =>[orig_patent_app_number] => 029761 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/029761
Two-dimensional discrete cosine transform processor Mar 23, 1987 Issued
Array ( [id] => 2424142 [patent_doc_number] => 04748438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-31 [patent_title] => 'Signal processing apparatus for selectively filtering digital signal parameter packets' [patent_app_type] => 1 [patent_app_number] => 7/038489 [patent_app_country] => US [patent_app_date] => 1987-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2744 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/748/04748438.pdf [firstpage_image] =>[orig_patent_app_number] => 038489 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/038489
Signal processing apparatus for selectively filtering digital signal parameter packets Mar 22, 1987 Issued
Array ( [id] => 2567263 [patent_doc_number] => 04817027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-28 [patent_title] => 'Method and apparatus for evaluating partial derivatives' [patent_app_type] => 1 [patent_app_number] => 7/028953 [patent_app_country] => US [patent_app_date] => 1987-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 9831 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/817/04817027.pdf [firstpage_image] =>[orig_patent_app_number] => 028953 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/028953
Method and apparatus for evaluating partial derivatives Mar 22, 1987 Issued
Array ( [id] => 2482148 [patent_doc_number] => 04812809 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-14 [patent_title] => 'Circuit for checking the coincidence of a data word with a reference data word' [patent_app_type] => 1 [patent_app_number] => 7/030043 [patent_app_country] => US [patent_app_date] => 1987-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1830 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 580 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/812/04812809.pdf [firstpage_image] =>[orig_patent_app_number] => 030043 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/030043
Circuit for checking the coincidence of a data word with a reference data word Mar 22, 1987 Issued
Array ( [id] => 2567318 [patent_doc_number] => 04817030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-28 [patent_title] => 'CMOS full-adder stage' [patent_app_type] => 1 [patent_app_number] => 7/028251 [patent_app_country] => US [patent_app_date] => 1987-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1744 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 889 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/817/04817030.pdf [firstpage_image] =>[orig_patent_app_number] => 028251 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/028251
CMOS full-adder stage Mar 19, 1987 Issued
Array ( [id] => 2485872 [patent_doc_number] => 04813008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-14 [patent_title] => 'Multiplier circuit suitable for obtaining a negative product of a multiplier and a multiplicand' [patent_app_type] => 1 [patent_app_number] => 7/028183 [patent_app_country] => US [patent_app_date] => 1987-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 6622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/813/04813008.pdf [firstpage_image] =>[orig_patent_app_number] => 028183 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/028183
Multiplier circuit suitable for obtaining a negative product of a multiplier and a multiplicand Mar 18, 1987 Issued
Array ( [id] => 2501891 [patent_doc_number] => 04825401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-25 [patent_title] => 'Functional dividable multiplier array circuit for multiplication of full words or simultaneous multiplication of two half words' [patent_app_type] => 1 [patent_app_number] => 7/025201 [patent_app_country] => US [patent_app_date] => 1987-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4903 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/825/04825401.pdf [firstpage_image] =>[orig_patent_app_number] => 025201 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/025201
Functional dividable multiplier array circuit for multiplication of full words or simultaneous multiplication of two half words Mar 11, 1987 Issued
Array ( [id] => 2519853 [patent_doc_number] => 04831573 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-16 [patent_title] => 'Programmable integrated circuit micro-sequencer device' [patent_app_type] => 1 [patent_app_number] => 7/023054 [patent_app_country] => US [patent_app_date] => 1987-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 7653 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/831/04831573.pdf [firstpage_image] =>[orig_patent_app_number] => 023054 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/023054
Programmable integrated circuit micro-sequencer device Mar 5, 1987 Issued
Array ( [id] => 2396998 [patent_doc_number] => 04764923 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-16 [patent_title] => 'Digital receive filter circuit' [patent_app_type] => 1 [patent_app_number] => 7/021291 [patent_app_country] => US [patent_app_date] => 1987-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3257 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/764/04764923.pdf [firstpage_image] =>[orig_patent_app_number] => 021291 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/021291
Digital receive filter circuit Mar 2, 1987 Issued
Array ( [id] => 2721818 [patent_doc_number] => 05010505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Optical cross bar arithmetic/logic unit' [patent_app_type] => 1 [patent_app_number] => 7/019761 [patent_app_country] => US [patent_app_date] => 1987-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2434 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010505.pdf [firstpage_image] =>[orig_patent_app_number] => 019761 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/019761
Optical cross bar arithmetic/logic unit Feb 26, 1987 Issued
Array ( [id] => 2564895 [patent_doc_number] => 04815019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-21 [patent_title] => 'Fast ALU equals zero circuit' [patent_app_type] => 1 [patent_app_number] => 7/019101 [patent_app_country] => US [patent_app_date] => 1987-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2017 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/815/04815019.pdf [firstpage_image] =>[orig_patent_app_number] => 019101 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/019101
Fast ALU equals zero circuit Feb 25, 1987 Issued
07/020140 METHOD OF CORRECTING ERRONEOUS VALUES OF SAMPLES OF AN EQUIDISTANTLY SAMPLED SIGNAL AND DEVICE FOR CARRYING OUT THE METHOD Feb 24, 1987 Abandoned
Array ( [id] => 2535370 [patent_doc_number] => 04797847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-10 [patent_title] => 'Discrete cosine transformer' [patent_app_type] => 1 [patent_app_number] => 7/010702 [patent_app_country] => US [patent_app_date] => 1987-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3308 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/797/04797847.pdf [firstpage_image] =>[orig_patent_app_number] => 010702 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/010702
Discrete cosine transformer Feb 3, 1987 Issued
Array ( [id] => 2453160 [patent_doc_number] => 04750145 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-06-07 [patent_title] => 'Doppler AGC using overflow counters internal to FFT' [patent_app_type] => 1 [patent_app_number] => 7/009656 [patent_app_country] => US [patent_app_date] => 1987-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6252 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/750/04750145.pdf [firstpage_image] =>[orig_patent_app_number] => 009656 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/009656
Doppler AGC using overflow counters internal to FFT Jan 27, 1987 Issued
Array ( [id] => 2390926 [patent_doc_number] => 04789952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-06 [patent_title] => 'Method and apparatus for digital compensation and digital equalization' [patent_app_type] => 1 [patent_app_number] => 6/947158 [patent_app_country] => US [patent_app_date] => 1986-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5879 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/789/04789952.pdf [firstpage_image] =>[orig_patent_app_number] => 947158 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/947158
Method and apparatus for digital compensation and digital equalization Dec 28, 1986 Issued
Array ( [id] => 2397539 [patent_doc_number] => 04794557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-27 [patent_title] => 'Floating-point normalizing circuit' [patent_app_type] => 1 [patent_app_number] => 6/946214 [patent_app_country] => US [patent_app_date] => 1986-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4625 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/794/04794557.pdf [firstpage_image] =>[orig_patent_app_number] => 946214 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/946214
Floating-point normalizing circuit Dec 23, 1986 Issued
Array ( [id] => 2429603 [patent_doc_number] => 04788653 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-29 [patent_title] => 'Digital filter for power system stabilizer' [patent_app_type] => 1 [patent_app_number] => 6/945741 [patent_app_country] => US [patent_app_date] => 1986-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3426 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/788/04788653.pdf [firstpage_image] =>[orig_patent_app_number] => 945741 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/945741
Digital filter for power system stabilizer Dec 22, 1986 Issued
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