Search

David H. Malzahn

Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786
Total Applications
3174
Issued Applications
2743
Pending Applications
60
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
06/729559 PROGRAMMABLE COMPUTER WITH ALPHANUMERIC CAPABILITIES HAVING FEW KEYBOARD KEYS May 1, 1985 Abandoned
Array ( [id] => 2365017 [patent_doc_number] => 04694415 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Adaptive digital filter for analog input signals' [patent_app_type] => 1 [patent_app_number] => 6/729397 [patent_app_country] => US [patent_app_date] => 1985-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3028 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694415.pdf [firstpage_image] =>[orig_patent_app_number] => 729397 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/729397
Adaptive digital filter for analog input signals Apr 30, 1985 Issued
Array ( [id] => 2451422 [patent_doc_number] => 04722068 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-26 [patent_title] => 'Double precision multiplier' [patent_app_type] => 1 [patent_app_number] => 6/727020 [patent_app_country] => US [patent_app_date] => 1985-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5547 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/722/04722068.pdf [firstpage_image] =>[orig_patent_app_number] => 727020 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/727020
Double precision multiplier Apr 24, 1985 Issued
Array ( [id] => 2451440 [patent_doc_number] => 04722069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-26 [patent_title] => 'Nonrestoring divider' [patent_app_type] => 1 [patent_app_number] => 6/719014 [patent_app_country] => US [patent_app_date] => 1985-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6593 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/722/04722069.pdf [firstpage_image] =>[orig_patent_app_number] => 719014 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/719014
Nonrestoring divider Apr 1, 1985 Issued
Array ( [id] => 2451406 [patent_doc_number] => 04722067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-26 [patent_title] => 'Method and apparatus for implementing modulo arithmetic calculations' [patent_app_type] => 1 [patent_app_number] => 6/715865 [patent_app_country] => US [patent_app_date] => 1985-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2702 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/722/04722067.pdf [firstpage_image] =>[orig_patent_app_number] => 715865 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/715865
Method and apparatus for implementing modulo arithmetic calculations Mar 24, 1985 Issued
Array ( [id] => 2422063 [patent_doc_number] => 04742479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-03 [patent_title] => 'Modulo arithmetic unit having arbitrary offset and modulo values' [patent_app_type] => 1 [patent_app_number] => 6/715864 [patent_app_country] => US [patent_app_date] => 1985-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6725 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/742/04742479.pdf [firstpage_image] =>[orig_patent_app_number] => 715864 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/715864
Modulo arithmetic unit having arbitrary offset and modulo values Mar 24, 1985 Issued
Array ( [id] => 2422516 [patent_doc_number] => 04744043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-10 [patent_title] => 'Data processor execution unit which receives data with reduced instruction overhead' [patent_app_type] => 1 [patent_app_number] => 6/715863 [patent_app_country] => US [patent_app_date] => 1985-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2658 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/744/04744043.pdf [firstpage_image] =>[orig_patent_app_number] => 715863 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/715863
Data processor execution unit which receives data with reduced instruction overhead Mar 24, 1985 Issued
Array ( [id] => 2451371 [patent_doc_number] => 04722065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-26 [patent_title] => 'Electronically programmable calculator with memory package' [patent_app_type] => 1 [patent_app_number] => 6/715016 [patent_app_country] => US [patent_app_date] => 1985-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 5300 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/722/04722065.pdf [firstpage_image] =>[orig_patent_app_number] => 715016 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/715016
Electronically programmable calculator with memory package Mar 21, 1985 Issued
Array ( [id] => 2317182 [patent_doc_number] => 04675836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-23 [patent_title] => 'Discrete cosine transform calculation processor' [patent_app_type] => 1 [patent_app_number] => 6/709856 [patent_app_country] => US [patent_app_date] => 1985-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5812 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/675/04675836.pdf [firstpage_image] =>[orig_patent_app_number] => 709856 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/709856
Discrete cosine transform calculation processor Mar 7, 1985 Issued
Array ( [id] => 2294713 [patent_doc_number] => 04679163 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-07 [patent_title] => 'Inverse discrete cosine transform calculation processor' [patent_app_type] => 1 [patent_app_number] => 6/709857 [patent_app_country] => US [patent_app_date] => 1985-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5161 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/679/04679163.pdf [firstpage_image] =>[orig_patent_app_number] => 709857 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/709857
Inverse discrete cosine transform calculation processor Mar 7, 1985 Issued
Array ( [id] => 2290893 [patent_doc_number] => 04604721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Computer and method for high speed prime factor transform' [patent_app_type] => 1 [patent_app_number] => 6/706222 [patent_app_country] => US [patent_app_date] => 1985-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 23216 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604721.pdf [firstpage_image] =>[orig_patent_app_number] => 706222 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/706222
Computer and method for high speed prime factor transform Feb 26, 1985 Issued
Array ( [id] => 2432561 [patent_doc_number] => 04763293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-09 [patent_title] => 'Data processing device for interpolation' [patent_app_type] => 1 [patent_app_number] => 6/705562 [patent_app_country] => US [patent_app_date] => 1985-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 11263 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/763/04763293.pdf [firstpage_image] =>[orig_patent_app_number] => 705562 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/705562
Data processing device for interpolation Feb 25, 1985 Issued
Array ( [id] => 2365019 [patent_doc_number] => 04694416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'VLSI programmable digital signal processor' [patent_app_type] => 1 [patent_app_number] => 6/705290 [patent_app_country] => US [patent_app_date] => 1985-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6998 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694416.pdf [firstpage_image] =>[orig_patent_app_number] => 705290 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/705290
VLSI programmable digital signal processor Feb 24, 1985 Issued
Array ( [id] => 2391036 [patent_doc_number] => 04789958 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-06 [patent_title] => 'Carry-look-ahead adder including bipolar and MOS transistors' [patent_app_type] => 1 [patent_app_number] => 6/703171 [patent_app_country] => US [patent_app_date] => 1985-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 63 [patent_no_of_words] => 20126 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/789/04789958.pdf [firstpage_image] =>[orig_patent_app_number] => 703171 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/703171
Carry-look-ahead adder including bipolar and MOS transistors Feb 18, 1985 Issued
Array ( [id] => 2346682 [patent_doc_number] => 04713786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-15 [patent_title] => 'Digital hardware selection filter' [patent_app_type] => 1 [patent_app_number] => 6/702136 [patent_app_country] => US [patent_app_date] => 1985-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 10241 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/713/04713786.pdf [firstpage_image] =>[orig_patent_app_number] => 702136 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/702136
Digital hardware selection filter Feb 14, 1985 Issued
Array ( [id] => 2292060 [patent_doc_number] => 04587626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-05-06 [patent_title] => 'Sum and difference conjugate discrete Fourier transform' [patent_app_type] => 1 [patent_app_number] => 6/701830 [patent_app_country] => US [patent_app_date] => 1985-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 23120 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/587/04587626.pdf [firstpage_image] =>[orig_patent_app_number] => 701830 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/701830
Sum and difference conjugate discrete Fourier transform Feb 13, 1985 Issued
Array ( [id] => 2286592 [patent_doc_number] => 04620292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-28 [patent_title] => 'Arithmetic logic unit for floating point data and/or fixed point data' [patent_app_type] => 1 [patent_app_number] => 6/700908 [patent_app_country] => US [patent_app_date] => 1985-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 8915 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/620/04620292.pdf [firstpage_image] =>[orig_patent_app_number] => 700908 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/700908
Arithmetic logic unit for floating point data and/or fixed point data Feb 11, 1985 Issued
Array ( [id] => 2225939 [patent_doc_number] => 04592006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-05-27 [patent_title] => 'Adder for floating point data suitable for digital signal processing' [patent_app_type] => 1 [patent_app_number] => 6/700907 [patent_app_country] => US [patent_app_date] => 1985-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 8912 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/592/04592006.pdf [firstpage_image] =>[orig_patent_app_number] => 700907 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/700907
Adder for floating point data suitable for digital signal processing Feb 11, 1985 Issued
Array ( [id] => 2420757 [patent_doc_number] => 04725974 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-16 [patent_title] => 'Electronic circuit capable of accurately carrying out a succession of divisions in a pipeline fashion' [patent_app_type] => 1 [patent_app_number] => 6/699307 [patent_app_country] => US [patent_app_date] => 1985-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6233 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/725/04725974.pdf [firstpage_image] =>[orig_patent_app_number] => 699307 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/699307
Electronic circuit capable of accurately carrying out a succession of divisions in a pipeline fashion Feb 6, 1985 Issued
Array ( [id] => 2333259 [patent_doc_number] => 04706209 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-10 [patent_title] => 'Arithmetic and logic unit with overflow indicator' [patent_app_type] => 1 [patent_app_number] => 6/696910 [patent_app_country] => US [patent_app_date] => 1985-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2384 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/706/04706209.pdf [firstpage_image] =>[orig_patent_app_number] => 696910 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/696910
Arithmetic and logic unit with overflow indicator Jan 30, 1985 Issued
Menu