David H. Malzahn

Array ( [id] => 2270424 [patent_doc_number] => 04593372 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-06-03 [patent_title] => 'Line generating method' [patent_app_type] => 1 [patent_app_number] => 6/554716 [patent_app_country] => US [patent_app_date] => 1983-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4065 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/593/04593372.pdf [firstpage_image] =>[orig_patent_app_number] => 554716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2227507 [patent_doc_number] => 04628472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-09 [patent_title] => 'Binary multiplier using ternary code' [patent_app_type] => 1 [patent_app_number] => 6/553488 [patent_app_country] => US [patent_app_date] => 1983-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7318 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/628/04628472.pdf [firstpage_image] =>[orig_patent_app_number] => 553488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2275445 [patent_doc_number] => 04584657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-22 [patent_title] => 'Charge transfer multiplier and filter' [patent_app_type] => 1 [patent_app_number] => 6/548067 [patent_app_country] => US [patent_app_date] => 1983-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 21 [patent_no_of_words] => 6694 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 461 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/584/04584657.pdf [firstpage_image] =>[orig_patent_app_number] => 548067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2130510 [patent_doc_number] => 04482976 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-13 [patent_title] => 'Voice data output apparatus for electronic cash registers' [patent_app_type] => 1 [patent_app_number] => 6/545594 [patent_app_country] => US [patent_app_date] => 1983-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4759 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/482/04482976.pdf [firstpage_image] =>[orig_patent_app_number] => 545594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2290866 [patent_doc_number] => 04604719 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Oscillator having a sixteen bit signal generation utilizing an eight bit processor' [patent_app_type] => 1 [patent_app_number] => 6/544280 [patent_app_country] => US [patent_app_date] => 1983-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3235 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604719.pdf [firstpage_image] =>[orig_patent_app_number] => 544280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2247033 [patent_doc_number] => 04617641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-14 [patent_title] => 'Operation unit for floating point data having a variable length exponent part' [patent_app_type] => 1 [patent_app_number] => 6/543426 [patent_app_country] => US [patent_app_date] => 1983-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 10629 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/617/04617641.pdf [firstpage_image] =>[orig_patent_app_number] => 543426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2218353 [patent_doc_number] => 04599701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-08 [patent_title] => 'Complex magnitude computation' [patent_app_type] => 1 [patent_app_number] => 6/543333 [patent_app_country] => US [patent_app_date] => 1983-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2672 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/599/04599701.pdf [firstpage_image] =>[orig_patent_app_number] => 543333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2203205 [patent_doc_number] => 04495590 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-01-22 [patent_title] => 'PLA With time division multiplex feature for improved density' [patent_app_type] => 1 [patent_app_number] => 6/542230 [patent_app_country] => US [patent_app_date] => 1983-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4087 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/495/04495590.pdf [firstpage_image] =>[orig_patent_app_number] => 542230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2272926 [patent_doc_number] => 04612625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-16 [patent_title] => 'Decimator employing finite impulse response digital filters' [patent_app_type] => 1 [patent_app_number] => 6/541050 [patent_app_country] => US [patent_app_date] => 1983-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1803 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/612/04612625.pdf [firstpage_image] =>[orig_patent_app_number] => 541050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2125274 [patent_doc_number] => 04481599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-06 [patent_title] => 'Voice data output device providing operator guidance in voice form' [patent_app_type] => 1 [patent_app_number] => 6/540910 [patent_app_country] => US [patent_app_date] => 1983-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 8195 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/481/04481599.pdf [firstpage_image] =>[orig_patent_app_number] => 540910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2238098 [patent_doc_number] => 04601006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-15 [patent_title] => 'Architecture for two dimensional fast fourier transform' [patent_app_type] => 1 [patent_app_number] => 6/539540 [patent_app_country] => US [patent_app_date] => 1983-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5253 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/601/04601006.pdf [firstpage_image] =>[orig_patent_app_number] => 539540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2317794 [patent_doc_number] => 04646257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-24 [patent_title] => 'Digital multiplication circuit for use in a microprocessor' [patent_app_type] => 1 [patent_app_number] => 6/538634 [patent_app_country] => US [patent_app_date] => 1983-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 4574 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/646/04646257.pdf [firstpage_image] =>[orig_patent_app_number] => 538634 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2290907 [patent_doc_number] => 04604722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Decimal arithmetic logic unit for doubling or complementing decimal operand' [patent_app_type] => 1 [patent_app_number] => 6/537899 [patent_app_country] => US [patent_app_date] => 1983-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 27 [patent_no_of_words] => 66444 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604722.pdf [firstpage_image] =>[orig_patent_app_number] => 537899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2227271 [patent_doc_number] => 04583192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-15 [patent_title] => 'MOS full adder circuit' [patent_app_type] => 1 [patent_app_number] => 6/538039 [patent_app_country] => US [patent_app_date] => 1983-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3459 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/583/04583192.pdf [firstpage_image] =>[orig_patent_app_number] => 538039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2290519 [patent_doc_number] => 04604695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Nibble and word addressable memory arrangement' [patent_app_type] => 1 [patent_app_number] => 6/537928 [patent_app_country] => US [patent_app_date] => 1983-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 27 [patent_no_of_words] => 67208 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 566 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604695.pdf [firstpage_image] =>[orig_patent_app_number] => 537928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2220938 [patent_doc_number] => 04615016 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-30 [patent_title] => 'Apparatus for performing simplified decimal multiplication by stripping leading zeroes' [patent_app_type] => 1 [patent_app_number] => 6/537910 [patent_app_country] => US [patent_app_date] => 1983-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 27 [patent_no_of_words] => 67038 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/615/04615016.pdf [firstpage_image] =>[orig_patent_app_number] => 537910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2245998 [patent_doc_number] => 04608659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-26 [patent_title] => 'Arithmetic logic unit with outputs indicating invalid computation results caused by invalid operands' [patent_app_type] => 1 [patent_app_number] => 6/537991 [patent_app_country] => US [patent_app_date] => 1983-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 27 [patent_no_of_words] => 66699 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/608/04608659.pdf [firstpage_image] =>[orig_patent_app_number] => 537991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2184996 [patent_doc_number] => 04507743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-26 [patent_title] => 'Calculation system utilizing definable keys' [patent_app_type] => 1 [patent_app_number] => 6/535552 [patent_app_country] => US [patent_app_date] => 1983-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2581 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/507/04507743.pdf [firstpage_image] =>[orig_patent_app_number] => 535552 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2352824 [patent_doc_number] => 04649507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-10 [patent_title] => 'Segmented transversal filter' [patent_app_type] => 1 [patent_app_number] => 6/531400 [patent_app_country] => US [patent_app_date] => 1983-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2840 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/649/04649507.pdf [firstpage_image] =>[orig_patent_app_number] => 531400 [rel_patent_id] =>[rel_patent_doc_number] =>)