
David H. Malzahn
Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786 |
| Total Applications | 3174 |
| Issued Applications | 2743 |
| Pending Applications | 60 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2225514
[patent_doc_number] => 04594678
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-06-10
[patent_title] => 'Digital parallel computing circuit for computing p=xy+z in a shortened time'
[patent_app_type] => 1
[patent_app_number] => 6/465386
[patent_app_country] => US
[patent_app_date] => 1983-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4646
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 374
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/594/04594678.pdf
[firstpage_image] =>[orig_patent_app_number] => 465386
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/465386 | Digital parallel computing circuit for computing p=xy+z in a shortened time | Feb 9, 1983 | Issued |
Array
(
[id] => 2149913
[patent_doc_number] => 04559609
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-17
[patent_title] => 'Full adder using transmission gates'
[patent_app_type] => 1
[patent_app_number] => 6/464641
[patent_app_country] => US
[patent_app_date] => 1983-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2135
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/559/04559609.pdf
[firstpage_image] =>[orig_patent_app_number] => 464641
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/464641 | Full adder using transmission gates | Feb 6, 1983 | Issued |
Array
(
[id] => 2142613
[patent_doc_number] => 04494214
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-15
[patent_title] => 'Apparatus for generating scaled weighting coefficients for sampled data filters'
[patent_app_type] => 1
[patent_app_number] => 6/463613
[patent_app_country] => US
[patent_app_date] => 1983-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3814
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/494/04494214.pdf
[firstpage_image] =>[orig_patent_app_number] => 463613
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/463613 | Apparatus for generating scaled weighting coefficients for sampled data filters | Feb 2, 1983 | Issued |
Array
(
[id] => 2227109
[patent_doc_number] => 04583180
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-04-15
[patent_title] => 'Floating point/logarithmic conversion system'
[patent_app_type] => 1
[patent_app_number] => 6/461729
[patent_app_country] => US
[patent_app_date] => 1983-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 1802
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/583/04583180.pdf
[firstpage_image] =>[orig_patent_app_number] => 461729
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/461729 | Floating point/logarithmic conversion system | Jan 27, 1983 | Issued |
Array
(
[id] => 2133717
[patent_doc_number] => 04543641
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-24
[patent_title] => 'Multiplication device using multiple-input adder'
[patent_app_type] => 1
[patent_app_number] => 6/461257
[patent_app_country] => US
[patent_app_date] => 1983-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2287
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 277
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/543/04543641.pdf
[firstpage_image] =>[orig_patent_app_number] => 461257
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/461257 | Multiplication device using multiple-input adder | Jan 25, 1983 | Issued |
Array
(
[id] => 2247565
[patent_doc_number] => 04567567
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-28
[patent_title] => 'Computer keyboard displaying many operating instructions with few keys'
[patent_app_type] => 1
[patent_app_number] => 6/459997
[patent_app_country] => US
[patent_app_date] => 1983-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3123
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/567/04567567.pdf
[firstpage_image] =>[orig_patent_app_number] => 459997
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/459997 | Computer keyboard displaying many operating instructions with few keys | Jan 20, 1983 | Issued |
Array
(
[id] => 2182404
[patent_doc_number] => 04547860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-15
[patent_title] => 'Computer keyboards with few keys designating hundreds of functions'
[patent_app_type] => 1
[patent_app_number] => 6/459998
[patent_app_country] => US
[patent_app_date] => 1983-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5431
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/547/04547860.pdf
[firstpage_image] =>[orig_patent_app_number] => 459998
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/459998 | Computer keyboards with few keys designating hundreds of functions | Jan 20, 1983 | Issued |
Array
(
[id] => 2185052
[patent_doc_number] => 04507747
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-03-26
[patent_title] => 'Procedure for shared-time processing of digital signals and application to a multiplexed self-adapting echo canceler'
[patent_app_type] => 1
[patent_app_number] => 6/457942
[patent_app_country] => US
[patent_app_date] => 1983-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 8127
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 401
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/507/04507747.pdf
[firstpage_image] =>[orig_patent_app_number] => 457942
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/457942 | Procedure for shared-time processing of digital signals and application to a multiplexed self-adapting echo canceler | Jan 13, 1983 | Issued |
Array
(
[id] => 2162592
[patent_doc_number] => 04525797
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-06-25
[patent_title] => 'N-bit carry select adder circuit having only one full adder per bit'
[patent_app_type] => 1
[patent_app_number] => 6/455091
[patent_app_country] => US
[patent_app_date] => 1983-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6902
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 521
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/525/04525797.pdf
[firstpage_image] =>[orig_patent_app_number] => 455091
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/455091 | N-bit carry select adder circuit having only one full adder per bit | Jan 2, 1983 | Issued |
Array
(
[id] => 2152617
[patent_doc_number] => 04539549
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-03
[patent_title] => 'Method and apparatus for determining minimum/maximum of multiple data words'
[patent_app_type] => 1
[patent_app_number] => 6/454813
[patent_app_country] => US
[patent_app_date] => 1982-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 8623
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/539/04539549.pdf
[firstpage_image] =>[orig_patent_app_number] => 454813
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/454813 | Method and apparatus for determining minimum/maximum of multiple data words | Dec 29, 1982 | Issued |
Array
(
[id] => 2176898
[patent_doc_number] => 04538240
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-08-27
[patent_title] => 'Method and apparatus for performing hashing operations using Galois field multiplication'
[patent_app_type] => 1
[patent_app_number] => 6/454912
[patent_app_country] => US
[patent_app_date] => 1982-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5360
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/538/04538240.pdf
[firstpage_image] =>[orig_patent_app_number] => 454912
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/454912 | Method and apparatus for performing hashing operations using Galois field multiplication | Dec 29, 1982 | Issued |
Array
(
[id] => 2205970
[patent_doc_number] => 04535417
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-08-13
[patent_title] => 'Method and apparatus for digital time-variant filtering'
[patent_app_type] => 1
[patent_app_number] => 6/452474
[patent_app_country] => US
[patent_app_date] => 1982-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7321
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/535/04535417.pdf
[firstpage_image] =>[orig_patent_app_number] => 452474
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/452474 | Method and apparatus for digital time-variant filtering | Dec 22, 1982 | Issued |
Array
(
[id] => 2275044
[patent_doc_number] => 04566075
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-21
[patent_title] => 'Table lookup multiplier employing compressed data read only memory'
[patent_app_type] => 1
[patent_app_number] => 6/451663
[patent_app_country] => US
[patent_app_date] => 1982-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3306
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/566/04566075.pdf
[firstpage_image] =>[orig_patent_app_number] => 451663
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/451663 | Table lookup multiplier employing compressed data read only memory | Dec 20, 1982 | Issued |
Array
(
[id] => 2205503
[patent_doc_number] => 04549280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-22
[patent_title] => 'Apparatus for creating a multiplication pipeline of arbitrary size'
[patent_app_type] => 1
[patent_app_number] => 6/451130
[patent_app_country] => US
[patent_app_date] => 1982-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 6219
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/549/04549280.pdf
[firstpage_image] =>[orig_patent_app_number] => 451130
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/451130 | Apparatus for creating a multiplication pipeline of arbitrary size | Dec 19, 1982 | Issued |
Array
(
[id] => 2266204
[patent_doc_number] => 04564919
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-14
[patent_title] => 'Correlation calculating apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/450785
[patent_app_country] => US
[patent_app_date] => 1982-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 44
[patent_no_of_words] => 13936
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/564/04564919.pdf
[firstpage_image] =>[orig_patent_app_number] => 450785
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/450785 | Correlation calculating apparatus | Dec 16, 1982 | Issued |
Array
(
[id] => 2180887
[patent_doc_number] => 04556948
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-03
[patent_title] => 'Multiplier speed improvement by skipping carry save adders'
[patent_app_type] => 1
[patent_app_number] => 6/449924
[patent_app_country] => US
[patent_app_date] => 1982-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5737
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 622
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/556/04556948.pdf
[firstpage_image] =>[orig_patent_app_number] => 449924
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/449924 | Multiplier speed improvement by skipping carry save adders | Dec 14, 1982 | Issued |
Array
(
[id] => 2184004
[patent_doc_number] => 04513386
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-04-23
[patent_title] => 'Random binary bit signal generator'
[patent_app_type] => 1
[patent_app_number] => 6/442709
[patent_app_country] => US
[patent_app_date] => 1982-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5507
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/513/04513386.pdf
[firstpage_image] =>[orig_patent_app_number] => 442709
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/442709 | Random binary bit signal generator | Nov 17, 1982 | Issued |
| 06/442232 | DISPLAY DEVICE FOR A PROGRAMMABLE ELECTRONIC CALCULATOR | Nov 15, 1982 | Abandoned |
Array
(
[id] => 2206175
[patent_doc_number] => 04528641
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-07-09
[patent_title] => 'Variable radix processor'
[patent_app_type] => 1
[patent_app_number] => 6/442212
[patent_app_country] => US
[patent_app_date] => 1982-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 5251
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/528/04528641.pdf
[firstpage_image] =>[orig_patent_app_number] => 442212
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/442212 | Variable radix processor | Nov 15, 1982 | Issued |
Array
(
[id] => 2162024
[patent_doc_number] => 04531194
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-07-23
[patent_title] => 'Tape recorder drive system in a programmable electronic calculator'
[patent_app_type] => 1
[patent_app_number] => 6/440303
[patent_app_country] => US
[patent_app_date] => 1982-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2637
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/531/04531194.pdf
[firstpage_image] =>[orig_patent_app_number] => 440303
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/440303 | Tape recorder drive system in a programmable electronic calculator | Nov 8, 1982 | Issued |