
David H. Malzahn
Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786 |
| Total Applications | 3174 |
| Issued Applications | 2743 |
| Pending Applications | 60 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2203228
[patent_doc_number] => 04495592
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-22
[patent_title] => 'Electronic data processing apparatus with equation operating system having implied multiplication of two hierarchical ranks'
[patent_app_type] => 1
[patent_app_number] => 6/381985
[patent_app_country] => US
[patent_app_date] => 1982-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 7205
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/495/04495592.pdf
[firstpage_image] =>[orig_patent_app_number] => 381985
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/381985 | Electronic data processing apparatus with equation operating system having implied multiplication of two hierarchical ranks | May 24, 1982 | Issued |
Array
(
[id] => 2198276
[patent_doc_number] => 04502120
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-02-26
[patent_title] => 'System for data transmission between electronic cash registers'
[patent_app_type] => 1
[patent_app_number] => 6/381221
[patent_app_country] => US
[patent_app_date] => 1982-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2970
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/502/04502120.pdf
[firstpage_image] =>[orig_patent_app_number] => 381221
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/381221 | System for data transmission between electronic cash registers | May 23, 1982 | Issued |
Array
(
[id] => 2211341
[patent_doc_number] => 04493046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-08
[patent_title] => 'Apparatus for generation of binary pseudo-random numbers'
[patent_app_type] => 1
[patent_app_number] => 6/381714
[patent_app_country] => US
[patent_app_date] => 1982-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2592
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/493/04493046.pdf
[firstpage_image] =>[orig_patent_app_number] => 381714
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/381714 | Apparatus for generation of binary pseudo-random numbers | May 23, 1982 | Issued |
Array
(
[id] => 2198365
[patent_doc_number] => 04511989
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-04-16
[patent_title] => 'Linear interpolating method and color conversion apparatus using this method'
[patent_app_type] => 1
[patent_app_number] => 6/378792
[patent_app_country] => US
[patent_app_date] => 1982-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 9133
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 352
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/511/04511989.pdf
[firstpage_image] =>[orig_patent_app_number] => 378792
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/378792 | Linear interpolating method and color conversion apparatus using this method | May 16, 1982 | Issued |
Array
(
[id] => 2076184
[patent_doc_number] => 04463439
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-31
[patent_title] => 'Sum and carry outputs with shared subfunctions'
[patent_app_type] => 1
[patent_app_number] => 6/379371
[patent_app_country] => US
[patent_app_date] => 1982-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 1089
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/463/04463439.pdf
[firstpage_image] =>[orig_patent_app_number] => 379371
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/379371 | Sum and carry outputs with shared subfunctions | May 16, 1982 | Issued |
Array
(
[id] => 2173054
[patent_doc_number] => 04541067
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-10
[patent_title] => 'Combinational logic structure using PASS transistors'
[patent_app_type] => 1
[patent_app_number] => 6/376895
[patent_app_country] => US
[patent_app_date] => 1982-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 73
[patent_no_of_words] => 5091
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/541/04541067.pdf
[firstpage_image] =>[orig_patent_app_number] => 376895
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/376895 | Combinational logic structure using PASS transistors | May 9, 1982 | Issued |
Array
(
[id] => 2111094
[patent_doc_number] => 04472806
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-09-18
[patent_title] => 'Signal selection and fault detection apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/373952
[patent_app_country] => US
[patent_app_date] => 1982-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2147
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/472/04472806.pdf
[firstpage_image] =>[orig_patent_app_number] => 373952
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/373952 | Signal selection and fault detection apparatus | May 2, 1982 | Issued |
Array
(
[id] => 2070048
[patent_doc_number] => 04488253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-12-11
[patent_title] => 'Parallel counter and application to binary adders'
[patent_app_type] => 1
[patent_app_number] => 6/373458
[patent_app_country] => US
[patent_app_date] => 1982-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2265
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 459
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/488/04488253.pdf
[firstpage_image] =>[orig_patent_app_number] => 373458
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/373458 | Parallel counter and application to binary adders | Apr 29, 1982 | Issued |
Array
(
[id] => 2172896
[patent_doc_number] => 04541057
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-10
[patent_title] => 'System for performing combined financial transactions with single dispensing of cash'
[patent_app_type] => 1
[patent_app_number] => 6/368815
[patent_app_country] => US
[patent_app_date] => 1982-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 27
[patent_no_of_words] => 12478
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/541/04541057.pdf
[firstpage_image] =>[orig_patent_app_number] => 368815
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/368815 | System for performing combined financial transactions with single dispensing of cash | Apr 14, 1982 | Issued |
Array
(
[id] => 2069999
[patent_doc_number] => 04488247
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-12-11
[patent_title] => 'Correction circuit for approximate quotient'
[patent_app_type] => 1
[patent_app_number] => 6/366325
[patent_app_country] => US
[patent_app_date] => 1982-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7604
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/488/04488247.pdf
[firstpage_image] =>[orig_patent_app_number] => 366325
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/366325 | Correction circuit for approximate quotient | Apr 6, 1982 | Issued |
Array
(
[id] => 2211361
[patent_doc_number] => 04493047
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-08
[patent_title] => 'Real time data smoother and significant values selector'
[patent_app_type] => 1
[patent_app_number] => 6/365816
[patent_app_country] => US
[patent_app_date] => 1982-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 6516
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/493/04493047.pdf
[firstpage_image] =>[orig_patent_app_number] => 365816
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/365816 | Real time data smoother and significant values selector | Apr 4, 1982 | Issued |
| 06/364923 | RATIO COMPARATOR FOR DIGITAL SIGNALS | Apr 1, 1982 | Abandoned |
Array
(
[id] => 2092497
[patent_doc_number] => 04476561
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-10-09
[patent_title] => 'Device for remotely supervising operation of a branched data-transmission network'
[patent_app_type] => 1
[patent_app_number] => 6/363140
[patent_app_country] => US
[patent_app_date] => 1982-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2826
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/476/04476561.pdf
[firstpage_image] =>[orig_patent_app_number] => 363140
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/363140 | Device for remotely supervising operation of a branched data-transmission network | Mar 28, 1982 | Issued |
Array
(
[id] => 2125287
[patent_doc_number] => 04481600
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-06
[patent_title] => 'Apparatus for speeding up digital division in radix-2.sup.n machine'
[patent_app_type] => 1
[patent_app_number] => 6/362071
[patent_app_country] => US
[patent_app_date] => 1982-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4886
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 649
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/481/04481600.pdf
[firstpage_image] =>[orig_patent_app_number] => 362071
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/362071 | Apparatus for speeding up digital division in radix-2.sup.n machine | Mar 25, 1982 | Issued |
Array
(
[id] => 2100864
[patent_doc_number] => 04475166
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-10-02
[patent_title] => 'Digital signal processing apparatus with improved display'
[patent_app_type] => 1
[patent_app_number] => 6/362171
[patent_app_country] => US
[patent_app_date] => 1982-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2176
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/475/04475166.pdf
[firstpage_image] =>[orig_patent_app_number] => 362171
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/362171 | Digital signal processing apparatus with improved display | Mar 24, 1982 | Issued |
Array
(
[id] => 2109252
[patent_doc_number] => 04473887
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-09-25
[patent_title] => 'Processing circuit for operating on elements of a Galois field'
[patent_app_type] => 1
[patent_app_number] => 6/360205
[patent_app_country] => US
[patent_app_date] => 1982-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 4659
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/473/04473887.pdf
[firstpage_image] =>[orig_patent_app_number] => 360205
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/360205 | Processing circuit for operating on elements of a Galois field | Mar 21, 1982 | Issued |
Array
(
[id] => 2133518
[patent_doc_number] => 04454589
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-06-12
[patent_title] => 'Programmable arithmetic logic unit'
[patent_app_type] => 1
[patent_app_number] => 6/357440
[patent_app_country] => US
[patent_app_date] => 1982-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1219
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 415
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/454/04454589.pdf
[firstpage_image] =>[orig_patent_app_number] => 357440
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/357440 | Programmable arithmetic logic unit | Mar 11, 1982 | Issued |
Array
(
[id] => 2123302
[patent_doc_number] => 04449197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-05-15
[patent_title] => 'One-bit full adder circuit'
[patent_app_type] => 1
[patent_app_number] => 6/356765
[patent_app_country] => US
[patent_app_date] => 1982-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3273
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/449/04449197.pdf
[firstpage_image] =>[orig_patent_app_number] => 356765
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/356765 | One-bit full adder circuit | Mar 9, 1982 | Issued |
Array
(
[id] => 2108801
[patent_doc_number] => 04484299
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-20
[patent_title] => 'Digital filter arrangement having memory means with addressable words stored therein'
[patent_app_type] => 1
[patent_app_number] => 6/356584
[patent_app_country] => US
[patent_app_date] => 1982-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1713
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/484/04484299.pdf
[firstpage_image] =>[orig_patent_app_number] => 356584
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/356584 | Digital filter arrangement having memory means with addressable words stored therein | Mar 8, 1982 | Issued |
Array
(
[id] => 2274988
[patent_doc_number] => 04566072
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-21
[patent_title] => 'Programmable calculator including means for digitizing the position of an X-Y plotter pen'
[patent_app_type] => 1
[patent_app_number] => 6/355431
[patent_app_country] => US
[patent_app_date] => 1982-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5701
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/566/04566072.pdf
[firstpage_image] =>[orig_patent_app_number] => 355431
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/355431 | Programmable calculator including means for digitizing the position of an X-Y plotter pen | Mar 7, 1982 | Issued |