
David H. Malzahn
Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786 |
| Total Applications | 3174 |
| Issued Applications | 2743 |
| Pending Applications | 60 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2115931
[patent_doc_number] => 04451919
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-05-29
[patent_title] => 'Digital signal processor for use in recording and/or reproducing equipment'
[patent_app_type] => 1
[patent_app_number] => 6/355207
[patent_app_country] => US
[patent_app_date] => 1982-03-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/451/04451919.pdf
[firstpage_image] =>[orig_patent_app_number] => 355207
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/355207 | Digital signal processor for use in recording and/or reproducing equipment | Mar 4, 1982 | Issued |
Array
(
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[patent_doc_number] => 04481598
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-06
[patent_title] => 'Electronic equipment having a second function keying system'
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[patent_app_number] => 6/353187
[patent_app_country] => US
[patent_app_date] => 1982-03-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/353187 | Electronic equipment having a second function keying system | Feb 28, 1982 | Issued |
Array
(
[id] => 2162447
[patent_doc_number] => 04510578
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[patent_kind] => NA
[patent_issue_date] => 1985-04-09
[patent_title] => 'Signal encoder using orthogonal transform'
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[patent_app_number] => 6/352236
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[patent_app_date] => 1982-02-25
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[patent_drawing_sheets_cnt] => 6
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Array
(
[id] => 2172768
[patent_doc_number] => 04541048
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[patent_kind] => NA
[patent_issue_date] => 1985-09-10
[patent_title] => 'Modular programmable signal processor'
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[patent_app_number] => 6/350937
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[patent_app_date] => 1982-02-22
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[firstpage_image] =>[orig_patent_app_number] => 350937
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/350937 | Modular programmable signal processor | Feb 21, 1982 | Issued |
Array
(
[id] => 2070042
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[patent_issue_date] => 1984-12-11
[patent_title] => 'Floating point addition architecture'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/350860 | Floating point addition architecture | Feb 21, 1982 | Issued |
Array
(
[id] => 2089957
[patent_doc_number] => 04438501
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[patent_kind] => NA
[patent_issue_date] => 1984-03-20
[patent_title] => 'Antilatchup pseudorandom binary sequence generator'
[patent_app_type] => 1
[patent_app_number] => 6/348844
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[firstpage_image] =>[orig_patent_app_number] => 348844
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/348844 | Antilatchup pseudorandom binary sequence generator | Feb 15, 1982 | Issued |
Array
(
[id] => 2060443
[patent_doc_number] => 04455610
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[patent_kind] => NA
[patent_issue_date] => 1984-06-19
[patent_title] => 'Self-contained estrous detection tag'
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[firstpage_image] =>[orig_patent_app_number] => 345580
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/345580 | Self-contained estrous detection tag | Feb 3, 1982 | Issued |
Array
(
[id] => 2186746
[patent_doc_number] => 04504821
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-03-12
[patent_title] => 'Integrated circuit board system and an integrated circuit board assembly for application thereto'
[patent_app_type] => 1
[patent_app_number] => 6/339745
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[patent_app_date] => 1982-01-15
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[pdf_file] => patents/04/504/04504821.pdf
[firstpage_image] =>[orig_patent_app_number] => 339745
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/339745 | Integrated circuit board system and an integrated circuit board assembly for application thereto | Jan 14, 1982 | Issued |
Array
(
[id] => 2009656
[patent_doc_number] => 04398262
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[patent_kind] => NA
[patent_issue_date] => 1983-08-09
[patent_title] => 'Time multiplexed n-ordered digital filter'
[patent_app_type] => 1
[patent_app_number] => 6/333538
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 333538
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/333538 | Time multiplexed n-ordered digital filter | Dec 21, 1981 | Issued |
Array
(
[id] => 2063420
[patent_doc_number] => 04433372
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[patent_kind] => NA
[patent_issue_date] => 1984-02-21
[patent_title] => 'Integrated logic MOS counter circuit'
[patent_app_type] => 1
[patent_app_number] => 6/330891
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[pdf_file] => patents/04/433/04433372.pdf
[firstpage_image] =>[orig_patent_app_number] => 330891
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/330891 | Integrated logic MOS counter circuit | Dec 14, 1981 | Issued |
Array
(
[id] => 2076178
[patent_doc_number] => 04463438
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[patent_issue_date] => 1984-07-31
[patent_title] => 'Shaft alignment calculator'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 329707
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/329707 | Shaft alignment calculator | Dec 10, 1981 | Issued |
Array
(
[id] => 2099002
[patent_doc_number] => 04456994
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[patent_kind] => NA
[patent_issue_date] => 1984-06-26
[patent_title] => 'Remote simulation by remote control from a computer desk'
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[firstpage_image] =>[orig_patent_app_number] => 329377
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/329377 | Remote simulation by remote control from a computer desk | Dec 9, 1981 | Issued |
| 06/325043 | PROCESS AND APPARATUS FOR TRANSLATING THE SAMPLING RATE OF A SAMPLING SEQUENCE | Nov 24, 1981 | Abandoned |
Array
(
[id] => 2100764
[patent_doc_number] => 04475157
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[patent_issue_date] => 1984-10-02
[patent_title] => 'Electronic bingo player'
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Array
(
[id] => 2081209
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[patent_title] => 'Method and apparatus for checking the parity of disassociated bit groups'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/321035 | Method and apparatus for checking the parity of disassociated bit groups | Nov 12, 1981 | Issued |
Array
(
[id] => 2094253
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[patent_title] => 'Machine check coordination'
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Array
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[firstpage_image] =>[orig_patent_app_number] => 319061
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/319061 | Digital signal separation filters | Nov 5, 1981 | Issued |
Array
(
[id] => 2078304
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[patent_title] => 'Self verifying logic system'
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[firstpage_image] =>[orig_patent_app_number] => 316306
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/316306 | Self verifying logic system | Oct 28, 1981 | Issued |
Array
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[patent_issue_date] => 1985-08-06
[patent_title] => 'Floating point type multiplier circuit with compensation for over-flow and under-flow in multiplication of numbers in two\'s compliment representation'
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Array
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[patent_title] => 'Comparison circuit for determining the statistical equality of two analog signals'
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