Search

David H. Malzahn

Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786
Total Applications
3174
Issued Applications
2743
Pending Applications
60
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2115931 [patent_doc_number] => 04451919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-05-29 [patent_title] => 'Digital signal processor for use in recording and/or reproducing equipment' [patent_app_type] => 1 [patent_app_number] => 6/355207 [patent_app_country] => US [patent_app_date] => 1982-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5365 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 479 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/451/04451919.pdf [firstpage_image] =>[orig_patent_app_number] => 355207 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/355207
Digital signal processor for use in recording and/or reproducing equipment Mar 4, 1982 Issued
Array ( [id] => 2125258 [patent_doc_number] => 04481598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-06 [patent_title] => 'Electronic equipment having a second function keying system' [patent_app_type] => 1 [patent_app_number] => 6/353187 [patent_app_country] => US [patent_app_date] => 1982-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2257 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/481/04481598.pdf [firstpage_image] =>[orig_patent_app_number] => 353187 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/353187
Electronic equipment having a second function keying system Feb 28, 1982 Issued
Array ( [id] => 2162447 [patent_doc_number] => 04510578 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-09 [patent_title] => 'Signal encoder using orthogonal transform' [patent_app_type] => 1 [patent_app_number] => 6/352236 [patent_app_country] => US [patent_app_date] => 1982-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 5237 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/510/04510578.pdf [firstpage_image] =>[orig_patent_app_number] => 352236 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/352236
Signal encoder using orthogonal transform Feb 24, 1982 Issued
Array ( [id] => 2172768 [patent_doc_number] => 04541048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-09-10 [patent_title] => 'Modular programmable signal processor' [patent_app_type] => 1 [patent_app_number] => 6/350937 [patent_app_country] => US [patent_app_date] => 1982-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 39 [patent_no_of_words] => 41932 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/541/04541048.pdf [firstpage_image] =>[orig_patent_app_number] => 350937 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/350937
Modular programmable signal processor Feb 21, 1982 Issued
Array ( [id] => 2070042 [patent_doc_number] => 04488252 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-12-11 [patent_title] => 'Floating point addition architecture' [patent_app_type] => 1 [patent_app_number] => 6/350860 [patent_app_country] => US [patent_app_date] => 1982-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4919 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/488/04488252.pdf [firstpage_image] =>[orig_patent_app_number] => 350860 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/350860
Floating point addition architecture Feb 21, 1982 Issued
Array ( [id] => 2089957 [patent_doc_number] => 04438501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-03-20 [patent_title] => 'Antilatchup pseudorandom binary sequence generator' [patent_app_type] => 1 [patent_app_number] => 6/348844 [patent_app_country] => US [patent_app_date] => 1982-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4270 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/438/04438501.pdf [firstpage_image] =>[orig_patent_app_number] => 348844 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/348844
Antilatchup pseudorandom binary sequence generator Feb 15, 1982 Issued
Array ( [id] => 2060443 [patent_doc_number] => 04455610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-06-19 [patent_title] => 'Self-contained estrous detection tag' [patent_app_type] => 1 [patent_app_number] => 6/345580 [patent_app_country] => US [patent_app_date] => 1982-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3223 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/455/04455610.pdf [firstpage_image] =>[orig_patent_app_number] => 345580 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/345580
Self-contained estrous detection tag Feb 3, 1982 Issued
Array ( [id] => 2186746 [patent_doc_number] => 04504821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-12 [patent_title] => 'Integrated circuit board system and an integrated circuit board assembly for application thereto' [patent_app_type] => 1 [patent_app_number] => 6/339745 [patent_app_country] => US [patent_app_date] => 1982-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2633 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/504/04504821.pdf [firstpage_image] =>[orig_patent_app_number] => 339745 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/339745
Integrated circuit board system and an integrated circuit board assembly for application thereto Jan 14, 1982 Issued
Array ( [id] => 2009656 [patent_doc_number] => 04398262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-08-09 [patent_title] => 'Time multiplexed n-ordered digital filter' [patent_app_type] => 1 [patent_app_number] => 6/333538 [patent_app_country] => US [patent_app_date] => 1981-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4014 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/398/04398262.pdf [firstpage_image] =>[orig_patent_app_number] => 333538 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/333538
Time multiplexed n-ordered digital filter Dec 21, 1981 Issued
Array ( [id] => 2063420 [patent_doc_number] => 04433372 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-02-21 [patent_title] => 'Integrated logic MOS counter circuit' [patent_app_type] => 1 [patent_app_number] => 6/330891 [patent_app_country] => US [patent_app_date] => 1981-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5717 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/433/04433372.pdf [firstpage_image] =>[orig_patent_app_number] => 330891 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/330891
Integrated logic MOS counter circuit Dec 14, 1981 Issued
Array ( [id] => 2076178 [patent_doc_number] => 04463438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-07-31 [patent_title] => 'Shaft alignment calculator' [patent_app_type] => 1 [patent_app_number] => 6/329707 [patent_app_country] => US [patent_app_date] => 1981-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2987 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/463/04463438.pdf [firstpage_image] =>[orig_patent_app_number] => 329707 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/329707
Shaft alignment calculator Dec 10, 1981 Issued
Array ( [id] => 2099002 [patent_doc_number] => 04456994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-06-26 [patent_title] => 'Remote simulation by remote control from a computer desk' [patent_app_type] => 1 [patent_app_number] => 6/329377 [patent_app_country] => US [patent_app_date] => 1981-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 30 [patent_no_of_words] => 13905 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/456/04456994.pdf [firstpage_image] =>[orig_patent_app_number] => 329377 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/329377
Remote simulation by remote control from a computer desk Dec 9, 1981 Issued
06/325043 PROCESS AND APPARATUS FOR TRANSLATING THE SAMPLING RATE OF A SAMPLING SEQUENCE Nov 24, 1981 Abandoned
Array ( [id] => 2100764 [patent_doc_number] => 04475157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-10-02 [patent_title] => 'Electronic bingo player' [patent_app_type] => 1 [patent_app_number] => 6/323265 [patent_app_country] => US [patent_app_date] => 1981-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2673 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/475/04475157.pdf [firstpage_image] =>[orig_patent_app_number] => 323265 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/323265
Electronic bingo player Nov 19, 1981 Issued
Array ( [id] => 2081209 [patent_doc_number] => 04462102 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-07-24 [patent_title] => 'Method and apparatus for checking the parity of disassociated bit groups' [patent_app_type] => 1 [patent_app_number] => 6/321035 [patent_app_country] => US [patent_app_date] => 1981-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4360 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/462/04462102.pdf [firstpage_image] =>[orig_patent_app_number] => 321035 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/321035
Method and apparatus for checking the parity of disassociated bit groups Nov 12, 1981 Issued
Array ( [id] => 2094253 [patent_doc_number] => 04464751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-08-07 [patent_title] => 'Machine check coordination' [patent_app_type] => 1 [patent_app_number] => 6/320162 [patent_app_country] => US [patent_app_date] => 1981-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2742 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/464/04464751.pdf [firstpage_image] =>[orig_patent_app_number] => 320162 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/320162
Machine check coordination Nov 9, 1981 Issued
Array ( [id] => 2205664 [patent_doc_number] => 04524423 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-06-18 [patent_title] => 'Digital signal separation filters' [patent_app_type] => 1 [patent_app_number] => 6/319061 [patent_app_country] => US [patent_app_date] => 1981-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4347 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/524/04524423.pdf [firstpage_image] =>[orig_patent_app_number] => 319061 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/319061
Digital signal separation filters Nov 5, 1981 Issued
Array ( [id] => 2078304 [patent_doc_number] => 04471484 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-09-11 [patent_title] => 'Self verifying logic system' [patent_app_type] => 1 [patent_app_number] => 6/316306 [patent_app_country] => US [patent_app_date] => 1981-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5888 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/471/04471484.pdf [firstpage_image] =>[orig_patent_app_number] => 316306 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/316306
Self verifying logic system Oct 28, 1981 Issued
Array ( [id] => 2205626 [patent_doc_number] => 04534010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-08-06 [patent_title] => 'Floating point type multiplier circuit with compensation for over-flow and under-flow in multiplication of numbers in two\'s compliment representation' [patent_app_type] => 1 [patent_app_number] => 6/313507 [patent_app_country] => US [patent_app_date] => 1981-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4981 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/534/04534010.pdf [firstpage_image] =>[orig_patent_app_number] => 313507 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/313507
Floating point type multiplier circuit with compensation for over-flow and under-flow in multiplication of numbers in two's compliment representation Oct 20, 1981 Issued
Array ( [id] => 2108726 [patent_doc_number] => 04484291 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-20 [patent_title] => 'Comparison circuit for determining the statistical equality of two analog signals' [patent_app_type] => 1 [patent_app_number] => 6/313393 [patent_app_country] => US [patent_app_date] => 1981-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2626 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/484/04484291.pdf [firstpage_image] =>[orig_patent_app_number] => 313393 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/313393
Comparison circuit for determining the statistical equality of two analog signals Oct 20, 1981 Issued
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