
David H. Malzahn
Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786 |
| Total Applications | 3174 |
| Issued Applications | 2743 |
| Pending Applications | 60 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2000361
[patent_doc_number] => 04384341
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-05-17
[patent_title] => 'Data processor having carry apparatus supporting a decimal divide operation'
[patent_app_type] => 1
[patent_app_number] => 6/219638
[patent_app_country] => US
[patent_app_date] => 1980-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9973
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 282
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/384/04384341.pdf
[firstpage_image] =>[orig_patent_app_number] => 219638
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/219638 | Data processor having carry apparatus supporting a decimal divide operation | Dec 23, 1980 | Issued |
Array
(
[id] => 2104226
[patent_doc_number] => 04458327
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-03
[patent_title] => 'Prime or relatively prime radix data processing system'
[patent_app_type] => 1
[patent_app_number] => 6/219321
[patent_app_country] => US
[patent_app_date] => 1980-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7273
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/458/04458327.pdf
[firstpage_image] =>[orig_patent_app_number] => 219321
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/219321 | Prime or relatively prime radix data processing system | Dec 21, 1980 | Issued |
Array
(
[id] => 1998581
[patent_doc_number] => 04380069
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-04-12
[patent_title] => 'Digital error detection using bracketing'
[patent_app_type] => 1
[patent_app_number] => 6/217796
[patent_app_country] => US
[patent_app_date] => 1980-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2500
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/380/04380069.pdf
[firstpage_image] =>[orig_patent_app_number] => 217796
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/217796 | Digital error detection using bracketing | Dec 17, 1980 | Issued |
Array
(
[id] => 2020141
[patent_doc_number] => 04400615
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-23
[patent_title] => 'Programmable counter circuit'
[patent_app_type] => 1
[patent_app_number] => 6/217386
[patent_app_country] => US
[patent_app_date] => 1980-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3302
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 297
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/400/04400615.pdf
[firstpage_image] =>[orig_patent_app_number] => 217386
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/217386 | Programmable counter circuit | Dec 16, 1980 | Issued |
Array
(
[id] => 2009068
[patent_doc_number] => 04412302
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-10-25
[patent_title] => 'Digital phase demodulation and correlation'
[patent_app_type] => 1
[patent_app_number] => 6/216167
[patent_app_country] => US
[patent_app_date] => 1980-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6011
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/412/04412302.pdf
[firstpage_image] =>[orig_patent_app_number] => 216167
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/216167 | Digital phase demodulation and correlation | Dec 14, 1980 | Issued |
Array
(
[id] => 2043343
[patent_doc_number] => 04386412
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-05-31
[patent_title] => 'Calculator with equation display device'
[patent_app_type] => 1
[patent_app_number] => 6/214719
[patent_app_country] => US
[patent_app_date] => 1980-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 28
[patent_no_of_words] => 7284
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/386/04386412.pdf
[firstpage_image] =>[orig_patent_app_number] => 214719
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/214719 | Calculator with equation display device | Dec 8, 1980 | Issued |
Array
(
[id] => 2045025
[patent_doc_number] => 04418410
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-11-29
[patent_title] => 'Error detection and correction apparatus for a logic array'
[patent_app_type] => 1
[patent_app_number] => 6/214313
[patent_app_country] => US
[patent_app_date] => 1980-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 6294
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/418/04418410.pdf
[firstpage_image] =>[orig_patent_app_number] => 214313
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/214313 | Error detection and correction apparatus for a logic array | Dec 7, 1980 | Issued |
Array
(
[id] => 2104762
[patent_doc_number] => 04429388
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-01-31
[patent_title] => 'Field programmable device with internal dynamic test circuit'
[patent_app_type] => 1
[patent_app_number] => 6/214210
[patent_app_country] => US
[patent_app_date] => 1980-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 25
[patent_no_of_words] => 6471
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/429/04429388.pdf
[firstpage_image] =>[orig_patent_app_number] => 214210
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/214210 | Field programmable device with internal dynamic test circuit | Dec 7, 1980 | Issued |
Array
(
[id] => 2018136
[patent_doc_number] => 04375081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-22
[patent_title] => 'Multistage digital filtering utilizing several criteria'
[patent_app_type] => 1
[patent_app_number] => 6/213583
[patent_app_country] => US
[patent_app_date] => 1980-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 6119
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/375/04375081.pdf
[firstpage_image] =>[orig_patent_app_number] => 213583
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/213583 | Multistage digital filtering utilizing several criteria | Dec 4, 1980 | Issued |
Array
(
[id] => 1998402
[patent_doc_number] => 04380051
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-04-12
[patent_title] => 'High speed digital divider having normalizing circuitry'
[patent_app_type] => 1
[patent_app_number] => 6/211009
[patent_app_country] => US
[patent_app_date] => 1980-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4286
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/380/04380051.pdf
[firstpage_image] =>[orig_patent_app_number] => 211009
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/211009 | High speed digital divider having normalizing circuitry | Nov 27, 1980 | Issued |
Array
(
[id] => 1953955
[patent_doc_number] => 04355366
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-10-19
[patent_title] => 'Circuitry for minimizing auto-correlation and bias in a random number generator'
[patent_app_type] => 1
[patent_app_number] => 6/210989
[patent_app_country] => US
[patent_app_date] => 1980-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2797
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/355/04355366.pdf
[firstpage_image] =>[orig_patent_app_number] => 210989
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/210989 | Circuitry for minimizing auto-correlation and bias in a random number generator | Nov 27, 1980 | Issued |
Array
(
[id] => 2023753
[patent_doc_number] => 04373201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-08
[patent_title] => 'Fail safe digital timer'
[patent_app_type] => 1
[patent_app_number] => 6/210967
[patent_app_country] => US
[patent_app_date] => 1980-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2556
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/373/04373201.pdf
[firstpage_image] =>[orig_patent_app_number] => 210967
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/210967 | Fail safe digital timer | Nov 27, 1980 | Issued |
Array
(
[id] => 2049458
[patent_doc_number] => 04379338
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-04-05
[patent_title] => 'Arithmetic circuit with overflow detection capability'
[patent_app_type] => 1
[patent_app_number] => 6/209250
[patent_app_country] => US
[patent_app_date] => 1980-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 6651
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/379/04379338.pdf
[firstpage_image] =>[orig_patent_app_number] => 209250
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/209250 | Arithmetic circuit with overflow detection capability | Nov 20, 1980 | Issued |
Array
(
[id] => 2043361
[patent_doc_number] => 04386414
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-05-31
[patent_title] => 'Data processing system utilizing a holographic optical element'
[patent_app_type] => 1
[patent_app_number] => 6/208178
[patent_app_country] => US
[patent_app_date] => 1980-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2274
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/386/04386414.pdf
[firstpage_image] =>[orig_patent_app_number] => 208178
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/208178 | Data processing system utilizing a holographic optical element | Nov 18, 1980 | Issued |
Array
(
[id] => 2061332
[patent_doc_number] => 04393470
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-07-12
[patent_title] => 'Method and device for the counting and management of asynchronous events emitted by peripheral devices in a data processing system'
[patent_app_type] => 1
[patent_app_number] => 6/206726
[patent_app_country] => US
[patent_app_date] => 1980-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 11272
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/393/04393470.pdf
[firstpage_image] =>[orig_patent_app_number] => 206726
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/206726 | Method and device for the counting and management of asynchronous events emitted by peripheral devices in a data processing system | Nov 13, 1980 | Issued |
Array
(
[id] => 2000059
[patent_doc_number] => 04374426
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-02-15
[patent_title] => 'Digital equalizer for high speed communication channels'
[patent_app_type] => 1
[patent_app_number] => 6/207045
[patent_app_country] => US
[patent_app_date] => 1980-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2703
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/374/04374426.pdf
[firstpage_image] =>[orig_patent_app_number] => 207045
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/207045 | Digital equalizer for high speed communication channels | Nov 13, 1980 | Issued |
Array
(
[id] => 2008435
[patent_doc_number] => 04402082
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-30
[patent_title] => 'Automatic line termination in distributed industrial process control system'
[patent_app_type] => 1
[patent_app_number] => 6/202471
[patent_app_country] => US
[patent_app_date] => 1980-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 8847
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/402/04402082.pdf
[firstpage_image] =>[orig_patent_app_number] => 202471
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/202471 | Automatic line termination in distributed industrial process control system | Oct 30, 1980 | Issued |
Array
(
[id] => 1997687
[patent_doc_number] => 04381550
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-04-26
[patent_title] => 'High speed dividing circuit'
[patent_app_type] => 1
[patent_app_number] => 6/201895
[patent_app_country] => US
[patent_app_date] => 1980-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5557
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/381/04381550.pdf
[firstpage_image] =>[orig_patent_app_number] => 201895
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/201895 | High speed dividing circuit | Oct 28, 1980 | Issued |
Array
(
[id] => 2044866
[patent_doc_number] => 04418393
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-11-29
[patent_title] => 'Matched filter spread spectrum code recovery apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/200827
[patent_app_country] => US
[patent_app_date] => 1980-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3124
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/418/04418393.pdf
[firstpage_image] =>[orig_patent_app_number] => 200827
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/200827 | Matched filter spread spectrum code recovery apparatus | Oct 26, 1980 | Issued |
Array
(
[id] => 2018113
[patent_doc_number] => 04369512
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-01-18
[patent_title] => 'Digital transmission circuit using means for introducing a redundancy on the most significant bit'
[patent_app_type] => 1
[patent_app_number] => 6/199867
[patent_app_country] => US
[patent_app_date] => 1980-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2721
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 338
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/369/04369512.pdf
[firstpage_image] =>[orig_patent_app_number] => 199867
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/199867 | Digital transmission circuit using means for introducing a redundancy on the most significant bit | Oct 22, 1980 | Issued |