Search

David H. Malzahn

Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786
Total Applications
3174
Issued Applications
2743
Pending Applications
60
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2044880 [patent_doc_number] => 04418394 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-11-29 [patent_title] => 'Optical residue arithmetic computer having programmable computation module' [patent_app_type] => 1 [patent_app_number] => 6/177953 [patent_app_country] => US [patent_app_date] => 1980-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 7176 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/418/04418394.pdf [firstpage_image] =>[orig_patent_app_number] => 177953 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/177953
Optical residue arithmetic computer having programmable computation module Aug 12, 1980 Issued
Array ( [id] => 1969615 [patent_doc_number] => 04363106 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-12-07 [patent_title] => 'Computation module for addition and multiplication in residue arithmetic' [patent_app_type] => 1 [patent_app_number] => 6/177954 [patent_app_country] => US [patent_app_date] => 1980-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5077 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/363/04363106.pdf [firstpage_image] =>[orig_patent_app_number] => 177954 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/177954
Computation module for addition and multiplication in residue arithmetic Aug 12, 1980 Issued
Array ( [id] => 1960339 [patent_doc_number] => 04339803 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-07-13 [patent_title] => 'Video frame store and real time processing system' [patent_app_type] => 1 [patent_app_number] => 6/176226 [patent_app_country] => US [patent_app_date] => 1980-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6933 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/339/04339803.pdf [firstpage_image] =>[orig_patent_app_number] => 176226 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/176226
Video frame store and real time processing system Aug 5, 1980 Issued
Array ( [id] => 1984248 [patent_doc_number] => 04356559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-26 [patent_title] => 'Logic arrangement for recursive digital filter' [patent_app_type] => 1 [patent_app_number] => 6/174516 [patent_app_country] => US [patent_app_date] => 1980-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7419 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/356/04356559.pdf [firstpage_image] =>[orig_patent_app_number] => 174516 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/174516
Logic arrangement for recursive digital filter Jul 31, 1980 Issued
Array ( [id] => 1989332 [patent_doc_number] => 04337518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-29 [patent_title] => 'Recursive-type digital filter with reduced round-off noise' [patent_app_type] => 1 [patent_app_number] => 6/172947 [patent_app_country] => US [patent_app_date] => 1980-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3586 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/337/04337518.pdf [firstpage_image] =>[orig_patent_app_number] => 172947 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/172947
Recursive-type digital filter with reduced round-off noise Jul 27, 1980 Issued
Array ( [id] => 1977870 [patent_doc_number] => 04348736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-09-07 [patent_title] => 'Programmable logic array adder' [patent_app_type] => 1 [patent_app_number] => 6/171215 [patent_app_country] => US [patent_app_date] => 1980-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6416 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/348/04348736.pdf [firstpage_image] =>[orig_patent_app_number] => 171215 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/171215
Programmable logic array adder Jul 21, 1980 Issued
Array ( [id] => 1934734 [patent_doc_number] => 04347580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-31 [patent_title] => 'Array convolver/correlator' [patent_app_type] => 1 [patent_app_number] => 6/170492 [patent_app_country] => US [patent_app_date] => 1980-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3853 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/347/04347580.pdf [firstpage_image] =>[orig_patent_app_number] => 170492 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/170492
Array convolver/correlator Jul 20, 1980 Issued
06/199902 OUTPUT PROCESSING SYSTEM FOR A DIGITAL ELECTRONIC MUSICAL INSTRUMENT Jul 20, 1980 Abandoned
Array ( [id] => 1999463 [patent_doc_number] => 04323968 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-06 [patent_title] => 'Multilevel storage system having unitary control of data transfers' [patent_app_type] => 1 [patent_app_number] => 6/169008 [patent_app_country] => US [patent_app_date] => 1980-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4919 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 416 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/323/04323968.pdf [firstpage_image] =>[orig_patent_app_number] => 169008 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/169008
Multilevel storage system having unitary control of data transfers Jul 14, 1980 Issued
Array ( [id] => 1977862 [patent_doc_number] => 04348734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-09-07 [patent_title] => 'Converter by stored switching pattern' [patent_app_type] => 1 [patent_app_number] => 6/168460 [patent_app_country] => US [patent_app_date] => 1980-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4493 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/348/04348734.pdf [firstpage_image] =>[orig_patent_app_number] => 168460 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/168460
Converter by stored switching pattern Jul 9, 1980 Issued
Array ( [id] => 1973158 [patent_doc_number] => 04344150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-10 [patent_title] => 'Coherent noise cancelling filter' [patent_app_type] => 1 [patent_app_number] => 6/168190 [patent_app_country] => US [patent_app_date] => 1980-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5758 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/344/04344150.pdf [firstpage_image] =>[orig_patent_app_number] => 168190 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/168190
Coherent noise cancelling filter Jul 9, 1980 Issued
Array ( [id] => 1963060 [patent_doc_number] => 04349889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-09-14 [patent_title] => 'Non-recursive filter having adjustable step-size for each iteration' [patent_app_type] => 1 [patent_app_number] => 6/168211 [patent_app_country] => US [patent_app_date] => 1980-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6564 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/349/04349889.pdf [firstpage_image] =>[orig_patent_app_number] => 168211 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/168211
Non-recursive filter having adjustable step-size for each iteration Jul 9, 1980 Issued
Array ( [id] => 1960571 [patent_doc_number] => 04334285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-08 [patent_title] => 'Divider for calculating by summation the quotient and remainder of an integer divided by a Mersenne number and a parallel processor system comprising memory modules, a Mersenne prime in number' [patent_app_type] => 1 [patent_app_number] => 6/166877 [patent_app_country] => US [patent_app_date] => 1980-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 8964 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/334/04334285.pdf [firstpage_image] =>[orig_patent_app_number] => 166877 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/166877
Divider for calculating by summation the quotient and remainder of an integer divided by a Mersenne number and a parallel processor system comprising memory modules, a Mersenne prime in number Jul 7, 1980 Issued
Array ( [id] => 1955988 [patent_doc_number] => 04326260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-20 [patent_title] => 'Linear piecewise waveform generator for an electronic musical instrument' [patent_app_type] => 1 [patent_app_number] => 6/166237 [patent_app_country] => US [patent_app_date] => 1980-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 4261 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/326/04326260.pdf [firstpage_image] =>[orig_patent_app_number] => 166237 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/166237
Linear piecewise waveform generator for an electronic musical instrument Jul 6, 1980 Issued
Array ( [id] => 1982093 [patent_doc_number] => 04328554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-05-04 [patent_title] => 'Programmable frequency synthesizer (PFS)' [patent_app_type] => 1 [patent_app_number] => 6/165598 [patent_app_country] => US [patent_app_date] => 1980-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3865 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/328/04328554.pdf [firstpage_image] =>[orig_patent_app_number] => 165598 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/165598
Programmable frequency synthesizer (PFS) Jul 2, 1980 Issued
Array ( [id] => 1982096 [patent_doc_number] => 04328555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-05-04 [patent_title] => 'Apparatus for computing two-dimensional discrete Fourier transforms' [patent_app_type] => 1 [patent_app_number] => 6/164121 [patent_app_country] => US [patent_app_date] => 1980-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8585 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/328/04328555.pdf [firstpage_image] =>[orig_patent_app_number] => 164121 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/164121
Apparatus for computing two-dimensional discrete Fourier transforms Jun 29, 1980 Issued
Array ( [id] => 1997393 [patent_doc_number] => 04345328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-17 [patent_title] => 'ECC Check bit generation using through checking parity bits' [patent_app_type] => 1 [patent_app_number] => 6/164211 [patent_app_country] => US [patent_app_date] => 1980-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2425 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/345/04345328.pdf [firstpage_image] =>[orig_patent_app_number] => 164211 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/164211
ECC Check bit generation using through checking parity bits Jun 29, 1980 Issued
Array ( [id] => 1973118 [patent_doc_number] => 04344141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-10 [patent_title] => 'Gas-turbine engine control' [patent_app_type] => 1 [patent_app_number] => 6/162545 [patent_app_country] => US [patent_app_date] => 1980-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4188 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/344/04344141.pdf [firstpage_image] =>[orig_patent_app_number] => 162545 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/162545
Gas-turbine engine control Jun 23, 1980 Issued
Array ( [id] => 2032243 [patent_doc_number] => 04377740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-03-22 [patent_title] => 'Initializing circuit arrangement for a counter circuit' [patent_app_type] => 1 [patent_app_number] => 6/161685 [patent_app_country] => US [patent_app_date] => 1980-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4055 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/377/04377740.pdf [firstpage_image] =>[orig_patent_app_number] => 161685 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/161685
Initializing circuit arrangement for a counter circuit Jun 22, 1980 Issued
Array ( [id] => 1960694 [patent_doc_number] => 04334310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-08 [patent_title] => 'Noise suppressing bilevel data signal driver circuit arrangement' [patent_app_type] => 1 [patent_app_number] => 6/162344 [patent_app_country] => US [patent_app_date] => 1980-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2708 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/334/04334310.pdf [firstpage_image] =>[orig_patent_app_number] => 162344 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/162344
Noise suppressing bilevel data signal driver circuit arrangement Jun 22, 1980 Issued
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