David H. Malzahn

Array ( [id] => 1928639 [patent_doc_number] => 04285059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-08-18 [patent_title] => 'Circuit for test of ultra high speed digital arithmetic units' [patent_app_type] => 1 [patent_app_number] => 6/101927 [patent_app_country] => US [patent_app_date] => 1979-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1752 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/285/04285059.pdf [firstpage_image] =>[orig_patent_app_number] => 101927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1866280 [patent_doc_number] => 04295220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-13 [patent_title] => 'Clock check circuits using delayed signals' [patent_app_type] => 1 [patent_app_number] => 6/098587 [patent_app_country] => US [patent_app_date] => 1979-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2683 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/295/04295220.pdf [firstpage_image] =>[orig_patent_app_number] => 098587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1975038 [patent_doc_number] => 04312067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-19 [patent_title] => 'Function test evaluation apparatus for evaluating a function test of a logic circuit' [patent_app_type] => 1 [patent_app_number] => 6/098694 [patent_app_country] => US [patent_app_date] => 1979-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5441 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/312/04312067.pdf [firstpage_image] =>[orig_patent_app_number] => 098694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1921608 [patent_doc_number] => 04264956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-04-28 [patent_title] => 'Call cost monitor' [patent_app_type] => 1 [patent_app_number] => 6/098267 [patent_app_country] => US [patent_app_date] => 1979-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3497 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 397 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/264/04264956.pdf [firstpage_image] =>[orig_patent_app_number] => 098267 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1901051 [patent_doc_number] => 04293917 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-06 [patent_title] => 'Non-linear function generator' [patent_app_type] => 1 [patent_app_number] => 6/097913 [patent_app_country] => US [patent_app_date] => 1979-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3138 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/293/04293917.pdf [firstpage_image] =>[orig_patent_app_number] => 097913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1975826 [patent_doc_number] => 04354248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Programmable multifrequency tone receiver' [patent_app_type] => 1 [patent_app_number] => 6/098093 [patent_app_country] => US [patent_app_date] => 1979-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10686 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354248.pdf [firstpage_image] =>[orig_patent_app_number] => 098093 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1948123 [patent_doc_number] => 04336598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-06-22 [patent_title] => 'Electronic calculator with musical note generation' [patent_app_type] => 1 [patent_app_number] => 6/097841 [patent_app_country] => US [patent_app_date] => 1979-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3001 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 388 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/336/04336598.pdf [firstpage_image] =>[orig_patent_app_number] => 097841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1968679 [patent_doc_number] => 04320507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-16 [patent_title] => 'Field programmable device having test provisions for fault detection' [patent_app_type] => 1 [patent_app_number] => 6/095782 [patent_app_country] => US [patent_app_date] => 1979-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4719 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/320/04320507.pdf [firstpage_image] =>[orig_patent_app_number] => 095782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1951738 [patent_doc_number] => 04321685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-23 [patent_title] => 'Circuit for reducing the limit cycle in a digital filter' [patent_app_type] => 1 [patent_app_number] => 6/095554 [patent_app_country] => US [patent_app_date] => 1979-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6446 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/321/04321685.pdf [firstpage_image] =>[orig_patent_app_number] => 095554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1999596 [patent_doc_number] => 04323982 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-06 [patent_title] => 'Logic circuit arrangement in the integrated MOS-circuitry technique' [patent_app_type] => 1 [patent_app_number] => 6/094931 [patent_app_country] => US [patent_app_date] => 1979-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5687 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/323/04323982.pdf [firstpage_image] =>[orig_patent_app_number] => 094931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1962301 [patent_doc_number] => 04358849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-11-09 [patent_title] => 'Method of checking validity of coded alpha/numeric signals with a data processor and a memory' [patent_app_type] => 1 [patent_app_number] => 6/093433 [patent_app_country] => US [patent_app_date] => 1979-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3340 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 669 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/358/04358849.pdf [firstpage_image] =>[orig_patent_app_number] => 093433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1914714 [patent_doc_number] => 04300233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-10 [patent_title] => 'Noise assessment of PCM regenerators' [patent_app_type] => 1 [patent_app_number] => 6/093228 [patent_app_country] => US [patent_app_date] => 1979-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2567 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/300/04300233.pdf [firstpage_image] =>[orig_patent_app_number] => 093228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1866153 [patent_doc_number] => 04295203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-13 [patent_title] => 'Automatic rounding of floating point operands' [patent_app_type] => 1 [patent_app_number] => 6/092907 [patent_app_country] => US [patent_app_date] => 1979-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 4 [patent_no_of_words] => 4894 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/295/04295203.pdf [firstpage_image] =>[orig_patent_app_number] => 092907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1865696 [patent_doc_number] => 04275452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-06-23 [patent_title] => 'Simplified fast fourier transform butterfly arithmetic unit' [patent_app_type] => 1 [patent_app_number] => 6/092387 [patent_app_country] => US [patent_app_date] => 1979-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6960 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/275/04275452.pdf [firstpage_image] =>[orig_patent_app_number] => 092387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1946248 [patent_doc_number] => 04314369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-02 [patent_title] => 'Digital coding process for recording sound channels with a television signal and apparatus realizing this process' [patent_app_type] => 1 [patent_app_number] => 6/088459 [patent_app_country] => US [patent_app_date] => 1979-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5477 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/314/04314369.pdf [firstpage_image] =>[orig_patent_app_number] => 088459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1907125 [patent_doc_number] => 04302819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-24 [patent_title] => 'Fault tolerant monolithic multiplier' [patent_app_type] => 1 [patent_app_number] => 6/086842 [patent_app_country] => US [patent_app_date] => 1979-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2013 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/302/04302819.pdf [firstpage_image] =>[orig_patent_app_number] => 086842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1901056 [patent_doc_number] => 04293918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-06 [patent_title] => 'Digital differential analyzer with an increment output function' [patent_app_type] => 1 [patent_app_number] => 6/086444 [patent_app_country] => US [patent_app_date] => 1979-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6352 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/293/04293918.pdf [firstpage_image] =>[orig_patent_app_number] => 086444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1968691 [patent_doc_number] => 04320509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-16 [patent_title] => 'LSI Circuit logic structure including data compression circuitry' [patent_app_type] => 1 [patent_app_number] => 6/086299 [patent_app_country] => US [patent_app_date] => 1979-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4945 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/320/04320509.pdf [firstpage_image] =>[orig_patent_app_number] => 086299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1928576 [patent_doc_number] => 04285047 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-08-18 [patent_title] => 'Digital adder circuit with a plurality of 1-bit adders and improved carry means' [patent_app_type] => 1 [patent_app_number] => 6/084457 [patent_app_country] => US [patent_app_date] => 1979-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 23 [patent_no_of_words] => 4905 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/285/04285047.pdf [firstpage_image] =>[orig_patent_app_number] => 084457 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1893470 [patent_doc_number] => 04288858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-08 [patent_title] => 'Inverse two-dimensional transform processor' [patent_app_type] => 1 [patent_app_number] => 6/080643 [patent_app_country] => US [patent_app_date] => 1979-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3153 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/288/04288858.pdf [firstpage_image] =>[orig_patent_app_number] => 080643 [rel_patent_id] =>[rel_patent_doc_number] =>)