
David H. Malzahn
Examiner (ID: 17134, Phone: (571)272-3727 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2193, 2306, 2301, 2787, 2182, 2121, 2302, 2124, 2183, 2307, 2786 |
| Total Applications | 3174 |
| Issued Applications | 2743 |
| Pending Applications | 60 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1890888
[patent_doc_number] => 04281390
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[patent_kind] => NA
[patent_issue_date] => 1981-07-28
[patent_title] => 'Programmable calculator including means for performing computed and uncomputed relative branching during program execution'
[patent_app_type] => 1
[patent_app_number] => 6/051581
[patent_app_country] => US
[patent_app_date] => 1979-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 13232
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[pdf_file] => patents/04/281/04281390.pdf
[firstpage_image] =>[orig_patent_app_number] => 051581
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/051581 | Programmable calculator including means for performing computed and uncomputed relative branching during program execution | Jun 24, 1979 | Issued |
Array
(
[id] => 1900567
[patent_doc_number] => 04263660
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-04-21
[patent_title] => 'Expandable arithmetic logic unit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/050382 | Expandable arithmetic logic unit | Jun 19, 1979 | Issued |
Array
(
[id] => 1907112
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[patent_kind] => NA
[patent_issue_date] => 1981-11-24
[patent_title] => 'Key input control apparatus'
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[patent_app_date] => 1979-06-20
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[firstpage_image] =>[orig_patent_app_number] => 050512
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/050512 | Key input control apparatus | Jun 19, 1979 | Issued |
Array
(
[id] => 1901072
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[patent_kind] => NA
[patent_issue_date] => 1981-10-06
[patent_title] => 'Method and signal processor for frequency analysis of time domain signals'
[patent_app_type] => 1
[patent_app_number] => 6/048810
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[patent_app_date] => 1979-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 14924
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[pdf_file] => patents/04/293/04293921.pdf
[firstpage_image] =>[orig_patent_app_number] => 048810
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/048810 | Method and signal processor for frequency analysis of time domain signals | Jun 14, 1979 | Issued |
Array
(
[id] => 1897262
[patent_doc_number] => 04282582
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[patent_kind] => NA
[patent_issue_date] => 1981-08-04
[patent_title] => 'Floating point processor architecture which performs subtraction with reduced number of guard bits'
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[patent_app_number] => 6/045218
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[firstpage_image] =>[orig_patent_app_number] => 045218
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/045218 | Floating point processor architecture which performs subtraction with reduced number of guard bits | Jun 3, 1979 | Issued |
Array
(
[id] => 1917132
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-12-29
[patent_title] => 'Structure for physical fault simulation of digital logic'
[patent_app_type] => 1
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[patent_app_country] => US
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[pdf_file] => patents/04/308/04308616.pdf
[firstpage_image] =>[orig_patent_app_number] => 043506
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/043506 | Structure for physical fault simulation of digital logic | May 28, 1979 | Issued |
Array
(
[id] => 1915240
[patent_doc_number] => 04271522
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-06-02
[patent_title] => 'Method of and apparatus for determining errors read from a magnetic recording medium'
[patent_app_type] => 1
[patent_app_number] => 6/042299
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[patent_app_date] => 1979-05-25
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[pdf_file] => patents/04/271/04271522.pdf
[firstpage_image] =>[orig_patent_app_number] => 042299
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/042299 | Method of and apparatus for determining errors read from a magnetic recording medium | May 24, 1979 | Issued |
Array
(
[id] => 1903628
[patent_doc_number] => 04276608
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-06-30
[patent_title] => 'Fibonacci p-code parallel adder'
[patent_app_type] => 1
[patent_app_number] => 6/038930
[patent_app_country] => US
[patent_app_date] => 1979-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4858
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[pdf_file] => patents/04/276/04276608.pdf
[firstpage_image] =>[orig_patent_app_number] => 038930
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/038930 | Fibonacci p-code parallel adder | May 13, 1979 | Issued |
Array
(
[id] => 1903623
[patent_doc_number] => 04276607
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-06-30
[patent_title] => 'Multiplier circuit which detects and skips over trailing zeros'
[patent_app_type] => 1
[patent_app_number] => 6/028214
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[patent_app_date] => 1979-04-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/276/04276607.pdf
[firstpage_image] =>[orig_patent_app_number] => 028214
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/028214 | Multiplier circuit which detects and skips over trailing zeros | Apr 8, 1979 | Issued |
Array
(
[id] => 1912621
[patent_doc_number] => 04278850
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-07-14
[patent_title] => 'Monitoring system for optical transmission line repeaters'
[patent_app_type] => 1
[patent_app_number] => 6/028312
[patent_app_country] => US
[patent_app_date] => 1979-04-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/278/04278850.pdf
[firstpage_image] =>[orig_patent_app_number] => 028312
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/028312 | Monitoring system for optical transmission line repeaters | Apr 8, 1979 | Issued |
Array
(
[id] => 1872476
[patent_doc_number] => 04253147
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-02-24
[patent_title] => 'Memory unit with pipelined cycle of operations'
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[pdf_file] => patents/04/253/04253147.pdf
[firstpage_image] =>[orig_patent_app_number] => 028621
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/028621 | Memory unit with pipelined cycle of operations | Apr 8, 1979 | Issued |
Array
(
[id] => 1900557
[patent_doc_number] => 04263658
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1981-04-21
[patent_title] => 'Electronic apparatus capable of storing operational sequence'
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[firstpage_image] =>[orig_patent_app_number] => 022142
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/022142 | Electronic apparatus capable of storing operational sequence | Mar 19, 1979 | Issued |
Array
(
[id] => 1927998
[patent_doc_number] => 04272827
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[patent_issue_date] => 1981-06-09
[patent_title] => 'Division processing method system having 2N-bit precision'
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[firstpage_image] =>[orig_patent_app_number] => 021011
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/021011 | Division processing method system having 2N-bit precision | Mar 15, 1979 | Issued |
Array
(
[id] => 1910753
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[patent_issue_date] => 1981-09-15
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[pdf_file] => patents/04/290/04290102.pdf
[firstpage_image] =>[orig_patent_app_number] => 954566
[rel_patent_id] =>[rel_patent_doc_number] =>) 05/954566 | Data processing system with read operation splitting | Oct 24, 1978 | Issued |
Array
(
[id] => 2042942
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[patent_issue_date] => 1983-11-01
[patent_title] => 'Floating point division control'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 05/952567 | Floating point division control | Oct 17, 1978 | Issued |
Array
(
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[patent_title] => 'Method and apparatus for implementing a processor based on the rationalized Haar transform for the purpose of real time compression of video data'
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[firstpage_image] =>[orig_patent_app_number] => 673799
[rel_patent_id] =>[rel_patent_doc_number] =>) 05/673799 | Method and apparatus for implementing a processor based on the rationalized Haar transform for the purpose of real time compression of video data | Apr 4, 1976 | Issued |
Array
(
[id] => 3130404
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[patent_issue_date] => 1995-01-10
[patent_title] => 'Complex adaptive fir filter'
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