David H. Malzahn

Array ( [id] => 5679249 [patent_doc_number] => 20060184605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Method of forcing 1\'s and inverting sum in an adder without incurring timing delay' [patent_app_type] => utility [patent_app_number] => 11/057330 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3106 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20060184605.pdf [firstpage_image] =>[orig_patent_app_number] => 11057330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 324843 [patent_doc_number] => 07519648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Encoder for a multiplier' [patent_app_type] => utility [patent_app_number] => 11/054954 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7345 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/519/07519648.pdf [firstpage_image] =>[orig_patent_app_number] => 11054954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 597607 [patent_doc_number] => 07451172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Handling denormal floating point operands when result must be normalized' [patent_app_type] => utility [patent_app_number] => 11/055046 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 8253 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/451/07451172.pdf [firstpage_image] =>[orig_patent_app_number] => 11055046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5673741 [patent_doc_number] => 20060179096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'System and method for a fused multiply-add dataflow with early feedback prior to rounding' [patent_app_type] => utility [patent_app_number] => 11/055232 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3556 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20060179096.pdf [firstpage_image] =>[orig_patent_app_number] => 11055232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5673744 [patent_doc_number] => 20060179099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'System and method for performing decimal floating point addition' [patent_app_type] => utility [patent_app_number] => 11/055231 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20060179099.pdf [firstpage_image] =>[orig_patent_app_number] => 11055231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5673747 [patent_doc_number] => 20060179102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'System and method for performing decimal division' [patent_app_type] => utility [patent_app_number] => 11/055221 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3936 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20060179102.pdf [firstpage_image] =>[orig_patent_app_number] => 11055221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 374796 [patent_doc_number] => 07475104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'System and method for providing a double adder for decimal floating point operations' [patent_app_type] => utility [patent_app_number] => 11/054687 [patent_app_country] => US [patent_app_date] => 2005-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3184 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/475/07475104.pdf [firstpage_image] =>[orig_patent_app_number] => 11054687 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5673746 [patent_doc_number] => 20060179101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'System and method for providing a decimal multiply algorithm using a double adder' [patent_app_type] => utility [patent_app_number] => 11/054567 [patent_app_country] => US [patent_app_date] => 2005-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4665 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20060179101.pdf [firstpage_image] =>[orig_patent_app_number] => 11054567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 366293 [patent_doc_number] => 07483931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-27 [patent_title] => 'Signal generator using IIR type digital filter; and method of generating, supplying, and stopping its output signal' [patent_app_type] => utility [patent_app_number] => 11/045044 [patent_app_country] => US [patent_app_date] => 2005-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5553 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/483/07483931.pdf [firstpage_image] =>[orig_patent_app_number] => 11045044 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 234542 [patent_doc_number] => 07599979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Apparatus for hybrid multiplier in GF(2m) and method thereof' [patent_app_type] => utility [patent_app_number] => 11/046340 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3708 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/599/07599979.pdf [firstpage_image] =>[orig_patent_app_number] => 11046340 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 312752 [patent_doc_number] => 07529790 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-05-05 [patent_title] => 'System and method of data analysis' [patent_app_type] => utility [patent_app_number] => 11/045558 [patent_app_country] => US [patent_app_date] => 2005-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3890 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/529/07529790.pdf [firstpage_image] =>[orig_patent_app_number] => 11045558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 600047 [patent_doc_number] => 07437393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Signal processing apparatus, non-integer divider, and fractional N-PLL synthesizer using the same' [patent_app_type] => utility [patent_app_number] => 11/038433 [patent_app_country] => US [patent_app_date] => 2005-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 11058 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437393.pdf [firstpage_image] =>[orig_patent_app_number] => 11038433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 58119 [patent_doc_number] => 07769797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'Apparatus and method of multiplication using a plurality of identical partial multiplication modules' [patent_app_type] => utility [patent_app_number] => 11/037547 [patent_app_country] => US [patent_app_date] => 2005-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/769/07769797.pdf [firstpage_image] =>[orig_patent_app_number] => 11037547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7042155 [patent_doc_number] => 20050160211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Signal processor, signal processing method, signal processing program, recording medium with the signal processing program recorded therein and measuring instrument' [patent_app_type] => utility [patent_app_number] => 11/037270 [patent_app_country] => US [patent_app_date] => 2005-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18005 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20050160211.pdf [firstpage_image] =>[orig_patent_app_number] => 11037270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7041880 [patent_doc_number] => 20050160122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'JOINT ADAPTIVE FIXED-POINT REPRESENTATION AND RELATED ARITHMETIC AND PROCESSOR THEREOF' [patent_app_type] => utility [patent_app_number] => 10/905729 [patent_app_country] => US [patent_app_date] => 2005-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7253 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20050160122.pdf [firstpage_image] =>[orig_patent_app_number] => 10905729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7041887 [patent_doc_number] => 20050160125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Dynamic filter' [patent_app_type] => utility [patent_app_number] => 11/037299 [patent_app_country] => US [patent_app_date] => 2005-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6918 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20050160125.pdf [firstpage_image] =>[orig_patent_app_number] => 11037299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9289095 [patent_doc_number] => 08645447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Method and structure for cache aware transposition via rectangular subsections' [patent_app_type] => utility [patent_app_number] => 11/035933 [patent_app_country] => US [patent_app_date] => 2005-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11035933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6985100 [patent_doc_number] => 20050154772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Digital filter and digital broadcasting receiver having the same' [patent_app_type] => utility [patent_app_number] => 11/029422 [patent_app_country] => US [patent_app_date] => 2005-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4495 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20050154772.pdf [firstpage_image] =>[orig_patent_app_number] => 11029422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 279729 [patent_doc_number] => 07558814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Realization method of self-equalized multiple passband filter' [patent_app_type] => utility [patent_app_number] => 11/027832 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 3913 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/558/07558814.pdf [firstpage_image] =>[orig_patent_app_number] => 11027832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6927386 [patent_doc_number] => 20050240643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'DCT processor used for implementing discrete cosine transform (DCT)' [patent_app_type] => utility [patent_app_number] => 11/023954 [patent_app_country] => US [patent_app_date] => 2004-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10095 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20050240643.pdf [firstpage_image] =>[orig_patent_app_number] => 11023954 [rel_patent_id] =>[rel_patent_doc_number] =>)