Search

David Hung Vu

Examiner (ID: 8907, Phone: (571)272-1831 , Office: P/2844 )

Most Active Art Unit
2821
Art Unit(s)
2817, 2828, 2502, 2844, 2821
Total Applications
1734
Issued Applications
1511
Pending Applications
64
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9220290 [patent_doc_number] => 20140015065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'CMOS DEVICE AND FABRICATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/744864 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13744864 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/744864
CMOS device and fabrication method Jan 17, 2013 Issued
Array ( [id] => 8947697 [patent_doc_number] => 20130193477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'LIGHT EMITTING DIODE DEVICE AND METHOD OF PRODUCING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/744743 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9908 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13744743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/744743
LIGHT EMITTING DIODE DEVICE AND METHOD OF PRODUCING THE SAME Jan 17, 2013 Abandoned
Array ( [id] => 8973648 [patent_doc_number] => 20130207078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'InGaN-Based Double Heterostructure Field Effect Transistor and Method of Forming the Same' [patent_app_type] => utility [patent_app_number] => 13/745046 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3610 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13745046 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/745046
InGaN-Based Double Heterostructure Field Effect Transistor and Method of Forming the Same Jan 17, 2013 Abandoned
Array ( [id] => 9763068 [patent_doc_number] => 08847396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Semiconductor integrated circuit and fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/744781 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3121 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13744781 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/744781
Semiconductor integrated circuit and fabricating the same Jan 17, 2013 Issued
Array ( [id] => 13043133 [patent_doc_number] => 10043706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Mitigating pattern collapse [patent_app_type] => utility [patent_app_number] => 13/744485 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9135 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13744485 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/744485
Mitigating pattern collapse Jan 17, 2013 Issued
Array ( [id] => 9711390 [patent_doc_number] => 08835965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Application of semiconductor quantum dot phosphors in nanopillar light emitting diodes' [patent_app_type] => utility [patent_app_number] => 13/744526 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3845 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13744526 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/744526
Application of semiconductor quantum dot phosphors in nanopillar light emitting diodes Jan 17, 2013 Issued
Array ( [id] => 10184701 [patent_doc_number] => 09214383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Method of semiconductor integrated circuit fabrication' [patent_app_type] => utility [patent_app_number] => 13/745060 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13745060 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/745060
Method of semiconductor integrated circuit fabrication Jan 17, 2013 Issued
Array ( [id] => 9600786 [patent_doc_number] => 20140197468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'METHODS OF FORMING SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/743454 [patent_app_country] => US [patent_app_date] => 2013-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5421 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13743454 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/743454
Methods of forming semiconductor device with self-aligned contact elements and the resulting device Jan 16, 2013 Issued
Array ( [id] => 9542480 [patent_doc_number] => 20140167127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Memory Devices and Methods of Manufacture Thereof' [patent_app_type] => utility [patent_app_number] => 13/715641 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6198 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715641 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715641
Memory devices and methods of manufacture thereof Dec 13, 2012 Issued
Array ( [id] => 9316524 [patent_doc_number] => 20140048862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/715324 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715324 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715324
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Dec 13, 2012 Abandoned
Array ( [id] => 9542494 [patent_doc_number] => 20140167141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Charge Trapping Split Gate Embedded Flash Memory and Associated Methods' [patent_app_type] => utility [patent_app_number] => 13/715582 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8173 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715582 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715582
Charge Trapping Split Gate Embedded Flash Memory and Associated Methods Dec 13, 2012 Abandoned
Array ( [id] => 10652340 [patent_doc_number] => 09368606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Memory first process flow and device' [patent_app_type] => utility [patent_app_number] => 13/715577 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 8532 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715577
Memory first process flow and device Dec 13, 2012 Issued
Array ( [id] => 11227611 [patent_doc_number] => 09455338 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Methods for fabricating PNP bipolar junction transistors' [patent_app_type] => utility [patent_app_number] => 13/715470 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4564 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715470 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715470
Methods for fabricating PNP bipolar junction transistors Dec 13, 2012 Issued
Array ( [id] => 9542495 [patent_doc_number] => 20140167142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Use Disposable Gate Cap to Form Transistors, and Split Gate Charge Trapping Memory Cells' [patent_app_type] => utility [patent_app_number] => 13/715673 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6980 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715673 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715673
Use Disposable Gate Cap to Form Transistors, and Split Gate Charge Trapping Memory Cells Dec 13, 2012 Abandoned
Array ( [id] => 9303842 [patent_doc_number] => 20140042516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/715504 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6886 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715504 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715504
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Dec 13, 2012 Abandoned
Array ( [id] => 9051167 [patent_doc_number] => 20130248881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/715204 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715204
Semiconductor device and method for manufacturing the same Dec 13, 2012 Issued
Array ( [id] => 12147533 [patent_doc_number] => 09881791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Method for producing an oxide film using a low temperature process, an oxide film and an electronic device thereof' [patent_app_type] => utility [patent_app_number] => 14/394869 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6239 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14394869 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/394869
Method for producing an oxide film using a low temperature process, an oxide film and an electronic device thereof Nov 29, 2012 Issued
Array ( [id] => 9220351 [patent_doc_number] => 20140015126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/670188 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13670188 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/670188
SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE USING THE SAME Nov 5, 2012 Abandoned
Array ( [id] => 8811961 [patent_doc_number] => 20130113006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/670129 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5309 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13670129 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/670129
SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF Nov 5, 2012 Abandoned
Array ( [id] => 8818496 [patent_doc_number] => 20130119541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 13/670202 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3989 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13670202 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/670202
PRINTED CIRCUIT BOARD Nov 5, 2012 Abandoned
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