Search

David J. Goodwin

Examiner (ID: 414, Phone: (571)272-8451 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2818, 2822
Total Applications
1083
Issued Applications
702
Pending Applications
118
Abandoned Applications
297

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16502575 [patent_doc_number] => 10867973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Package structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/050881 [patent_app_country] => US [patent_app_date] => 2018-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 9425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050881 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/050881
Package structure and method of forming the same Jul 30, 2018 Issued
Array ( [id] => 16418005 [patent_doc_number] => 10825907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Self-aligned contact and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/048515 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 82 [patent_no_of_words] => 10392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048515 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048515
Self-aligned contact and manufacturing method thereof Jul 29, 2018 Issued
Array ( [id] => 15414945 [patent_doc_number] => 20200027795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => GATE SPACER FORMATION FOR SCALED CMOS DEVICES [patent_app_type] => utility [patent_app_number] => 16/037915 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037915 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/037915
Gate spacer formation for scaled CMOS devices Jul 16, 2018 Issued
Array ( [id] => 14284973 [patent_doc_number] => 20190139771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 16/037652 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037652 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/037652
Method of manufacturing integrated circuit device Jul 16, 2018 Issued
Array ( [id] => 13581725 [patent_doc_number] => 20180342411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => CHIP IDENTIFICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 16/037871 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/037871
CHIP IDENTIFICATION SYSTEM Jul 16, 2018 Abandoned
Array ( [id] => 14381875 [patent_doc_number] => 20190164850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => SEMICONDUCTOR STRUCTURE AND TESTING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/020860 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020860
Semiconductor structure and testing method thereof Jun 26, 2018 Issued
Array ( [id] => 15331971 [patent_doc_number] => 20200006315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SUBSTRATE STRUCTURE AND MANUFACTURING PROCESS [patent_app_type] => utility [patent_app_number] => 16/020953 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020953
Substrate structure and manufacturing process Jun 26, 2018 Issued
Array ( [id] => 16280218 [patent_doc_number] => 10763259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Semiconductor device manufacturing method [patent_app_type] => utility [patent_app_number] => 16/020703 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 5561 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020703 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020703
Semiconductor device manufacturing method Jun 26, 2018 Issued
Array ( [id] => 13499791 [patent_doc_number] => 20180301438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => LED SURFACE-MOUNT DEVICE AND LED DISPLAY INCORPORATING SUCH DEVICE [patent_app_type] => utility [patent_app_number] => 16/012529 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012529
LED SURFACE-MOUNT DEVICE AND LED DISPLAY INCORPORATING SUCH DEVICE Jun 18, 2018 Abandoned
Array ( [id] => 16000937 [patent_doc_number] => 20200176339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SEMICONDUCTOR WAFER [patent_app_type] => utility [patent_app_number] => 16/631507 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16631507 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/631507
SEMICONDUCTOR WAFER Jun 12, 2018 Abandoned
Array ( [id] => 14191681 [patent_doc_number] => 20190115546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => OPPOSITE SUBSTRATE AND MANUFACTURING METHOD THEREOF, ORGANIC LIGHT-EMITTING DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/994197 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994197 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994197
Opposite substrate and manufacturing method thereof, organic light-emitting display panel and display device May 30, 2018 Issued
Array ( [id] => 14414331 [patent_doc_number] => 20190173009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => ORGANIC ELECTROLUMINESCENT DEVICE AND PREPARATION METHOD, EVAPORATION DEVICE [patent_app_type] => utility [patent_app_number] => 16/323765 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16323765 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/323765
Organic electroluminescent device and preparation method, evaporation device May 29, 2018 Issued
Array ( [id] => 14859575 [patent_doc_number] => 10418524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Optoelectronic device [patent_app_type] => utility [patent_app_number] => 15/952197 [patent_app_country] => US [patent_app_date] => 2018-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15952197 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/952197
Optoelectronic device Apr 11, 2018 Issued
Array ( [id] => 13349791 [patent_doc_number] => 20180226435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/947853 [patent_app_country] => US [patent_app_date] => 2018-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947853 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/947853
Method for forming semiconductor device Apr 7, 2018 Issued
Array ( [id] => 13485309 [patent_doc_number] => 20180294197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => SYSTEM DESIGN FOR IN-LINE PARTICLE AND CONTAMINATION METROLOGY FOR SHOWERHEAD AND ELECTRODE PARTS [patent_app_type] => utility [patent_app_number] => 15/945806 [patent_app_country] => US [patent_app_date] => 2018-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945806 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/945806
SYSTEM DESIGN FOR IN-LINE PARTICLE AND CONTAMINATION METROLOGY FOR SHOWERHEAD AND ELECTRODE PARTS Apr 4, 2018 Abandoned
Array ( [id] => 13485247 [patent_doc_number] => 20180294166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => Gapfill Using Reactive Anneal [patent_app_type] => utility [patent_app_number] => 15/946107 [patent_app_country] => US [patent_app_date] => 2018-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15946107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/946107
Gapfill using reactive anneal Apr 4, 2018 Issued
Array ( [id] => 16812203 [patent_doc_number] => 20210134758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/618056 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16618056 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/618056
Semiconductor device and manufacturing method for semiconductor device Apr 3, 2018 Issued
Array ( [id] => 16339193 [patent_doc_number] => 10790161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Electronic device with adaptive vertical interconnect and fabricating method thereof [patent_app_type] => utility [patent_app_number] => 15/937423 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 54 [patent_no_of_words] => 21614 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937423 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937423
Electronic device with adaptive vertical interconnect and fabricating method thereof Mar 26, 2018 Issued
Array ( [id] => 13470423 [patent_doc_number] => 20180286754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => WORKPIECE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 15/937402 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937402 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937402
Workpiece processing method Mar 26, 2018 Issued
Array ( [id] => 13470295 [patent_doc_number] => 20180286690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => METHOD OF PROCESSING WORKPIECE [patent_app_type] => utility [patent_app_number] => 15/937441 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937441 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937441
METHOD OF PROCESSING WORKPIECE Mar 26, 2018 Abandoned
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