Search

David J. Goodwin

Examiner (ID: 10119, Phone: (571)272-8451 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2822, 2817, 2818
Total Applications
1079
Issued Applications
702
Pending Applications
119
Abandoned Applications
297

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19054749 [patent_doc_number] => 20240096718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => TESTKEY STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/945606 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945606 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945606
TESTKEY STRUCTURE AND METHOD FOR FORMING THE SAME Sep 14, 2022 Pending
Array ( [id] => 19038217 [patent_doc_number] => 20240088032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => Structure and Method of Fabrication for High Performance Integrated Passive Device [patent_app_type] => utility [patent_app_number] => 17/932182 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932182
Structure and Method of Fabrication for High Performance Integrated Passive Device Sep 13, 2022 Pending
Array ( [id] => 19038269 [patent_doc_number] => 20240088084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => TIGHTLY-COUPLED RANDOM ACCESS MEMORY INTERFACE SHIM DIE [patent_app_type] => utility [patent_app_number] => 17/943104 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943104
TIGHTLY-COUPLED RANDOM ACCESS MEMORY INTERFACE SHIM DIE Sep 11, 2022 Pending
Array ( [id] => 19670851 [patent_doc_number] => 12183621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Methods for adjusting surface topography of a substrate support apparatus [patent_app_type] => utility [patent_app_number] => 17/931444 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 8194 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931444
Methods for adjusting surface topography of a substrate support apparatus Sep 11, 2022 Issued
Array ( [id] => 18655260 [patent_doc_number] => 20230301111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/941987 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941987 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941987
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME Sep 8, 2022 Pending
Array ( [id] => 18210219 [patent_doc_number] => 20230056480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => Electroluminescent Display Device [patent_app_type] => utility [patent_app_number] => 17/886894 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886894 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886894
Electroluminescent Display Device Aug 11, 2022 Pending
Array ( [id] => 18196164 [patent_doc_number] => 20230049683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => FORMATION OF MEMORY DIE AND LOGIC DIE WITH WAFER-ON-WAFER BOND [patent_app_type] => utility [patent_app_number] => 17/884775 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884775 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884775
FORMATION OF MEMORY DIE AND LOGIC DIE WITH WAFER-ON-WAFER BOND Aug 9, 2022 Pending
Array ( [id] => 18243927 [patent_doc_number] => 20230076238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SEMICONDUCTOR CHIP WITH STEPPED SIDEWALL, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/882748 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882748 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882748
SEMICONDUCTOR CHIP WITH STEPPED SIDEWALL, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME Aug 7, 2022 Pending
Array ( [id] => 18024254 [patent_doc_number] => 20220375753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Doping Techniques [patent_app_type] => utility [patent_app_number] => 17/882177 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882177 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882177
Doping techniques Aug 4, 2022 Issued
Array ( [id] => 18040199 [patent_doc_number] => 20220384416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => DUMMY POLY LAYOUT FOR HIGH DENSITY DEVICES [patent_app_type] => utility [patent_app_number] => 17/881960 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881960 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881960
Dummy poly layout for high density devices Aug 4, 2022 Issued
Array ( [id] => 20416833 [patent_doc_number] => 12500127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Method of fabricating semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/873182 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 3023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873182
Method of fabricating semiconductor structure Jul 25, 2022 Issued
Array ( [id] => 18040116 [patent_doc_number] => 20220384333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => Sensor Package and Method [patent_app_type] => utility [patent_app_number] => 17/814995 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814995
Sensor Package and Method Jul 25, 2022 Pending
Array ( [id] => 18024327 [patent_doc_number] => 20220375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method of Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/872750 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872750
Semiconductor Package and Method of Manufacturing the Same Jul 24, 2022 Pending
Array ( [id] => 19906533 [patent_doc_number] => 12283552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Extended seal ring structure on wafer-stacking [patent_app_type] => utility [patent_app_number] => 17/872809 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 51 [patent_no_of_words] => 6727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872809
Extended seal ring structure on wafer-stacking Jul 24, 2022 Issued
Array ( [id] => 18024327 [patent_doc_number] => 20220375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method of Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/872750 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872750
Semiconductor Package and Method of Manufacturing the Same Jul 24, 2022 Pending
Array ( [id] => 18024327 [patent_doc_number] => 20220375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method of Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/872750 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872750
Semiconductor Package and Method of Manufacturing the Same Jul 24, 2022 Pending
Array ( [id] => 17993451 [patent_doc_number] => 20220359488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => Die Stacking Structure and Method Forming Same [patent_app_type] => utility [patent_app_number] => 17/814766 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814766
Die stacking structure and method forming same Jul 24, 2022 Issued
Array ( [id] => 18024327 [patent_doc_number] => 20220375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method of Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/872750 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872750
Semiconductor Package and Method of Manufacturing the Same Jul 24, 2022 Pending
Array ( [id] => 18024327 [patent_doc_number] => 20220375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method of Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/872750 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872750
Semiconductor Package and Method of Manufacturing the Same Jul 24, 2022 Pending
Array ( [id] => 18024327 [patent_doc_number] => 20220375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method of Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/872750 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872750
Semiconductor Package and Method of Manufacturing the Same Jul 24, 2022 Pending
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