Search

David J. Goodwin

Examiner (ID: 10119, Phone: (571)272-8451 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2822, 2817, 2818
Total Applications
1079
Issued Applications
702
Pending Applications
119
Abandoned Applications
297

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19610929 [patent_doc_number] => 12159810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/746492 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6559 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746492
Semiconductor device May 16, 2022 Issued
Array ( [id] => 18458914 [patent_doc_number] => 20230200196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => DEPOSITION DEVICE AND DEPOSITION METHOD [patent_app_type] => utility [patent_app_number] => 17/745365 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745365
DEPOSITION DEVICE AND DEPOSITION METHOD May 15, 2022 Pending
Array ( [id] => 18776563 [patent_doc_number] => 20230371405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => PHASE CHANGE HETEROSTRUCTURES WITH CONTROLLED LINEAR DYNAMIC RANGE [patent_app_type] => utility [patent_app_number] => 17/663236 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663236 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/663236
PHASE CHANGE HETEROSTRUCTURES WITH CONTROLLED LINEAR DYNAMIC RANGE May 12, 2022 Pending
Array ( [id] => 18776563 [patent_doc_number] => 20230371405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => PHASE CHANGE HETEROSTRUCTURES WITH CONTROLLED LINEAR DYNAMIC RANGE [patent_app_type] => utility [patent_app_number] => 17/663236 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663236 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/663236
PHASE CHANGE HETEROSTRUCTURES WITH CONTROLLED LINEAR DYNAMIC RANGE May 12, 2022 Pending
Array ( [id] => 19973916 [patent_doc_number] => 12342549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Integrated circuitry, array of cross-point memory cells, method used in forming integrated circuitry [patent_app_type] => utility [patent_app_number] => 17/742154 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742154 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742154
Integrated circuitry, array of cross-point memory cells, method used in forming integrated circuitry May 10, 2022 Issued
Array ( [id] => 19873841 [patent_doc_number] => 12266713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Transistor with dielectric spacers and method of fabrication therefor [patent_app_type] => utility [patent_app_number] => 17/661827 [patent_app_country] => US [patent_app_date] => 2022-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 13710 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661827 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661827
Transistor with dielectric spacers and method of fabrication therefor May 2, 2022 Issued
Array ( [id] => 20148333 [patent_doc_number] => 12382693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Semiconductor device and methods of formation [patent_app_type] => utility [patent_app_number] => 17/661136 [patent_app_country] => US [patent_app_date] => 2022-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 16294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661136
Semiconductor device and methods of formation Apr 27, 2022 Issued
Array ( [id] => 18196730 [patent_doc_number] => 20230050249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => Metal Contact Isolation and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 17/729893 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17729893 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/729893
Metal Contact Isolation and Methods of Forming the Same Apr 25, 2022 Pending
Array ( [id] => 17780118 [patent_doc_number] => 20220246468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => Metal Oxide Composite As Etch Stop Layer [patent_app_type] => utility [patent_app_number] => 17/728295 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728295 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/728295
Metal oxide composite as etch stop layer Apr 24, 2022 Issued
Array ( [id] => 18729473 [patent_doc_number] => 20230343769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => PACKAGING ARCHITECTURE FOR WAFER-SCALE KNOWN-GOOD-DIE TO KNOWN-GOOD-DIE HYBRID BONDING [patent_app_type] => utility [patent_app_number] => 17/728147 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728147 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/728147
PACKAGING ARCHITECTURE FOR WAFER-SCALE KNOWN-GOOD-DIE TO KNOWN-GOOD-DIE HYBRID BONDING Apr 24, 2022 Pending
Array ( [id] => 19253039 [patent_doc_number] => 20240204036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SPLICING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/772590 [patent_app_country] => US [patent_app_date] => 2022-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5604 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17772590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/772590
Splicing display device Apr 18, 2022 Issued
Array ( [id] => 17765236 [patent_doc_number] => 20220238850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => DISPLAY PANELS AND DISPLAY DEVICES [patent_app_type] => utility [patent_app_number] => 17/722872 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722872 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/722872
Display panels and display devices Apr 17, 2022 Issued
Array ( [id] => 20077400 [patent_doc_number] => 12351450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Dual membrane piezoelectric microelectromechanical system microphone [patent_app_type] => utility [patent_app_number] => 17/659030 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 1102 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/659030
Dual membrane piezoelectric microelectromechanical system microphone Apr 12, 2022 Issued
Array ( [id] => 18211852 [patent_doc_number] => 20230058116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/659135 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/659135
SEMICONDUCTOR DEVICE Apr 12, 2022 Pending
Array ( [id] => 18211852 [patent_doc_number] => 20230058116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/659135 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/659135
SEMICONDUCTOR DEVICE Apr 12, 2022 Pending
Array ( [id] => 18696415 [patent_doc_number] => 20230326854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => POWER DISTRIBUTION NETWORKS FOR SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 17/658487 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17658487 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/658487
POWER DISTRIBUTION NETWORKS FOR SEMICONDUCTOR CHIP Apr 7, 2022 Pending
Array ( [id] => 18679871 [patent_doc_number] => 20230317529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHOD OF TESTING STRUCTURES AND STACKING WAFERS [patent_app_type] => utility [patent_app_number] => 17/712052 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/712052
METHOD OF TESTING STRUCTURES AND STACKING WAFERS Mar 31, 2022 Pending
Array ( [id] => 17993735 [patent_doc_number] => 20220359772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => METHODS AND SYSTEM OF ENHANCED NEAR-INFRARED LIGHT ABSORPTION OF IMAGING SYSTEMS USING METASURFACES AND NANOSTRUCTURES [patent_app_type] => utility [patent_app_number] => 17/703961 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703961 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703961
METHODS AND SYSTEM OF ENHANCED NEAR-INFRARED LIGHT ABSORPTION OF IMAGING SYSTEMS USING METASURFACES AND NANOSTRUCTURES Mar 23, 2022 Pending
Array ( [id] => 17723402 [patent_doc_number] => 20220216124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => HEAT CONDUCTOR, HEAT-CONDUCTING MATERIAL, AND PACKAGE STRUCTURE OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/702551 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702551 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702551
HEAT CONDUCTOR, HEAT-CONDUCTING MATERIAL, AND PACKAGE STRUCTURE OF SEMICONDUCTOR DEVICE Mar 22, 2022 Pending
Array ( [id] => 18653228 [patent_doc_number] => 20230299068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => Control Signal Route Through Backside Layers for High Performance Standard Cells [patent_app_type] => utility [patent_app_number] => 17/655678 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655678 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/655678
Control Signal Route Through Backside Layers for High Performance Standard Cells Mar 20, 2022 Pending
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