Search

David J. Huisman

Examiner (ID: 4847, Phone: (571)272-4168 , Office: P/2183 )

Most Active Art Unit
2183
Art Unit(s)
2183
Total Applications
930
Issued Applications
493
Pending Applications
141
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18229296 [patent_doc_number] => 20230068290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => IMPLEMENTATION METHOD AND SYSTEM OF RISC_V VECTOR INSTRUCTION SET VSETVLI INSTRUCTION [patent_app_type] => utility [patent_app_number] => 17/981365 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1775 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981365
IMPLEMENTATION METHOD AND SYSTEM OF RISC_V VECTOR INSTRUCTION SET VSETVLI INSTRUCTION Nov 3, 2022 Abandoned
Array ( [id] => 19099673 [patent_doc_number] => 20240118901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SWITCHING BETWEEN REDUNDANT AND NON-REDUNDANT MODES OF SOFTWARE EXECUTION [patent_app_type] => utility [patent_app_number] => 17/962093 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962093
SWITCHING BETWEEN REDUNDANT AND NON-REDUNDANT MODES OF SOFTWARE EXECUTION Oct 6, 2022 Pending
Array ( [id] => 19099668 [patent_doc_number] => 20240118896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => DYNAMIC BRANCH CAPABLE MICRO-OPERATIONS CACHE [patent_app_type] => utility [patent_app_number] => 17/960583 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960583 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960583
DYNAMIC BRANCH CAPABLE MICRO-OPERATIONS CACHE Oct 4, 2022 Pending
Array ( [id] => 19886015 [patent_doc_number] => 12271732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-08 [patent_title] => Configuration of a deep vector engine using an opcode table, control table, and datapath table [patent_app_type] => utility [patent_app_number] => 17/937333 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 19071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937333
Configuration of a deep vector engine using an opcode table, control table, and datapath table Sep 29, 2022 Issued
Array ( [id] => 19069444 [patent_doc_number] => 20240103870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => FAR JUMP AND INTERRUPT RETURN [patent_app_type] => utility [patent_app_number] => 17/955364 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955364
FAR JUMP AND INTERRUPT RETURN Sep 27, 2022 Pending
Array ( [id] => 19069445 [patent_doc_number] => 20240103871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => CPUID ENUMERATED DEPRECATION [patent_app_type] => utility [patent_app_number] => 17/955379 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955379
CPUID ENUMERATED DEPRECATION Sep 27, 2022 Pending
Array ( [id] => 18255574 [patent_doc_number] => 20230082613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => METHODS, SYSTEMS AND APPARATUS TO IMPROVE CONVOLUTION EFFICIENCY [patent_app_type] => utility [patent_app_number] => 17/947587 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947587 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947587
METHODS, SYSTEMS AND APPARATUS TO IMPROVE CONVOLUTION EFFICIENCY Sep 18, 2022 Pending
Array ( [id] => 19021864 [patent_doc_number] => 20240078035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => WRITE-BACK RESCHEDULING [patent_app_type] => utility [patent_app_number] => 17/900975 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900975 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900975
WRITE-BACK RESCHEDULING Aug 31, 2022 Pending
Array ( [id] => 18407540 [patent_doc_number] => 20230168893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => COMPUTATION PROCESSING APPARATUS AND METHOD OF PROCESSING COMPUTATION [patent_app_type] => utility [patent_app_number] => 17/884602 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884602
COMPUTATION PROCESSING APPARATUS AND METHOD OF PROCESSING COMPUTATION Aug 9, 2022 Abandoned
Array ( [id] => 18022787 [patent_doc_number] => 20220374286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => PARALLEL PROCESSING ARCHITECTURE FOR ATOMIC OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/879827 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879827 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879827
PARALLEL PROCESSING ARCHITECTURE FOR ATOMIC OPERATIONS Aug 2, 2022 Pending
Array ( [id] => 18251854 [patent_doc_number] => 20230078893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => INFORMATION PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/876076 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876076 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876076
INFORMATION PROCESSING DEVICE Jul 27, 2022 Abandoned
Array ( [id] => 17984572 [patent_doc_number] => 20220350609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => Protection Against Timing-based Security Attacks on Re-order Buffers [patent_app_type] => utility [patent_app_number] => 17/866868 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/866868
Protection Against Timing-based Security Attacks on Re-order Buffers Jul 17, 2022 Pending
Array ( [id] => 18881296 [patent_doc_number] => 20240004665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => APPARATUS, SYSTEM, AND METHOD FOR MAKING EFFICIENT PICKS OF MICRO-OPERATIONS FOR EXECUTION [patent_app_type] => utility [patent_app_number] => 17/855528 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855528 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855528
APPARATUS, SYSTEM, AND METHOD FOR MAKING EFFICIENT PICKS OF MICRO-OPERATIONS FOR EXECUTION Jun 29, 2022 Pending
Array ( [id] => 18881276 [patent_doc_number] => 20240004645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => Intermediate Representation Controller Circuit for Selecting Hardware Compute Units to Process Microcode According to Identified Intermediate Representation Primitives [patent_app_type] => utility [patent_app_number] => 17/854434 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854434
Intermediate Representation Controller Circuit for Selecting Hardware Compute Units to Process Microcode According to Identified Intermediate Representation Primitives Jun 29, 2022 Pending
Array ( [id] => 18864172 [patent_doc_number] => 20230418608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => IMPLICIT MEMORY CORRUPTION DETECTION FOR CONDITIONAL DATA TYPES [patent_app_type] => utility [patent_app_number] => 17/848142 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848142
IMPLICIT MEMORY CORRUPTION DETECTION FOR CONDITIONAL DATA TYPES Jun 22, 2022 Abandoned
Array ( [id] => 18846932 [patent_doc_number] => 20230409336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => VLIW Dynamic Communication [patent_app_type] => utility [patent_app_number] => 17/843640 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843640 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843640
VLIW Dynamic Communication Jun 16, 2022 Pending
Array ( [id] => 18846931 [patent_doc_number] => 20230409335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SELECTIVE DISABLE OF HISTORY-BASED PREDICTORS ON MODE TRANSITIONS [patent_app_type] => utility [patent_app_number] => 17/843179 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843179
SELECTIVE DISABLE OF HISTORY-BASED PREDICTORS ON MODE TRANSITIONS Jun 16, 2022 Pending
Array ( [id] => 19764602 [patent_doc_number] => 12222892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Routing data between processing units indentified by a sequentially ordered list of a packet prefix [patent_app_type] => utility [patent_app_number] => 17/842129 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 12822 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 655 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842129
Routing data between processing units indentified by a sequentially ordered list of a packet prefix Jun 15, 2022 Issued
Array ( [id] => 18846918 [patent_doc_number] => 20230409322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => PROCESSOR CIRCUITRY TO DETERMINE AN ENABLEMENT STATE FOR A CONSTRAINT ON MULTIPLE THREADS OF EXECUTION [patent_app_type] => utility [patent_app_number] => 17/841555 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841555 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841555
PROCESSOR CIRCUITRY TO DETERMINE AN ENABLEMENT STATE FOR A CONSTRAINT ON MULTIPLE THREADS OF EXECUTION Jun 14, 2022 Pending
Array ( [id] => 18060130 [patent_doc_number] => 20220391216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => GRAPHICS PROCESSING [patent_app_type] => utility [patent_app_number] => 17/804453 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804453 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804453
GRAPHICS PROCESSING May 26, 2022 Pending
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