Search

David J. Lee

Examiner (ID: 8253, Phone: (571)270-7134 , Office: P/2693 )

Most Active Art Unit
2693
Art Unit(s)
2633, 2693, 2629, 2613, 2625, 2695
Total Applications
248
Issued Applications
126
Pending Applications
3
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4888996 [patent_doc_number] => 20080263328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'ORTHOGONAL REGISTER ACCESS' [patent_app_type] => utility [patent_app_number] => 11/859547 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263328.pdf [firstpage_image] =>[orig_patent_app_number] => 11859547 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859547
ORTHOGONAL REGISTER ACCESS Sep 20, 2007 Abandoned
Array ( [id] => 4541082 [patent_doc_number] => 07954093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Load time instruction substitution' [patent_app_type] => utility [patent_app_number] => 11/855732 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6089 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/954/07954093.pdf [firstpage_image] =>[orig_patent_app_number] => 11855732 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/855732
Load time instruction substitution Sep 13, 2007 Issued
Array ( [id] => 7779879 [patent_doc_number] => 08122229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Dispatch mechanism for dispatching instructions from a host processor to a co-processor' [patent_app_type] => utility [patent_app_number] => 11/854432 [patent_app_country] => US [patent_app_date] => 2007-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16962 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122229.pdf [firstpage_image] =>[orig_patent_app_number] => 11854432 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/854432
Dispatch mechanism for dispatching instructions from a host processor to a co-processor Sep 11, 2007 Issued
Array ( [id] => 5454528 [patent_doc_number] => 20090070565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'METHODS, SYSTEMS, COMPUTER PROGRAMS AND APPARATUS FOR CHANGING A PROCESSOR STATE' [patent_app_type] => utility [patent_app_number] => 11/853486 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4875 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070565.pdf [firstpage_image] =>[orig_patent_app_number] => 11853486 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853486
METHODS, SYSTEMS, COMPUTER PROGRAMS AND APPARATUS FOR CHANGING A PROCESSOR STATE Sep 10, 2007 Abandoned
Array ( [id] => 4581454 [patent_doc_number] => 07840783 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-11-23 [patent_title] => 'System and method for performing a register renaming operation utilizing hardware which is capable of operating in at least two modes utilizing registers of multiple widths' [patent_app_type] => utility [patent_app_number] => 11/852916 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6557 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/840/07840783.pdf [firstpage_image] =>[orig_patent_app_number] => 11852916 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/852916
System and method for performing a register renaming operation utilizing hardware which is capable of operating in at least two modes utilizing registers of multiple widths Sep 9, 2007 Issued
Array ( [id] => 4558884 [patent_doc_number] => 07877585 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-25 [patent_title] => 'Structured programming control flow in a SIMD architecture' [patent_app_type] => utility [patent_app_number] => 11/845429 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/877/07877585.pdf [firstpage_image] =>[orig_patent_app_number] => 11845429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845429
Structured programming control flow in a SIMD architecture Aug 26, 2007 Issued
Array ( [id] => 7532566 [patent_doc_number] => 07844800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Method for renaming a large number of registers in a data processing system using a background channel' [patent_app_type] => utility [patent_app_number] => 11/892295 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3802 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/844/07844800.pdf [firstpage_image] =>[orig_patent_app_number] => 11892295 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/892295
Method for renaming a large number of registers in a data processing system using a background channel Aug 20, 2007 Issued
Array ( [id] => 5212101 [patent_doc_number] => 20070250685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Operation-processing device, method for constructing the same, and operation-processing system and method' [patent_app_type] => utility [patent_app_number] => 11/821424 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 26725 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20070250685.pdf [firstpage_image] =>[orig_patent_app_number] => 11821424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/821424
Operation-processing device, method for constructing the same, and operation-processing system and method Jun 21, 2007 Abandoned
Array ( [id] => 4671409 [patent_doc_number] => 20080046470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Operation-processing device, method for constructing the same, and operation-processing system and method' [patent_app_type] => utility [patent_app_number] => 11/821447 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 26728 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046470.pdf [firstpage_image] =>[orig_patent_app_number] => 11821447 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/821447
Operation-processing device, method for constructing the same, and operation-processing system and method Jun 21, 2007 Abandoned
Array ( [id] => 4653328 [patent_doc_number] => 20080040585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'Methods and Apparatus For Attaching Application Specific Functions Within An Array Processor' [patent_app_type] => utility [patent_app_number] => 11/736788 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3238 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20080040585.pdf [firstpage_image] =>[orig_patent_app_number] => 11736788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736788
Methods and apparatus for attaching application specific functions within an array processor Apr 17, 2007 Issued
Array ( [id] => 4889047 [patent_doc_number] => 20080263379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'WATCHDOG TIMER DEVICE AND METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 11/736212 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3722 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263379.pdf [firstpage_image] =>[orig_patent_app_number] => 11736212 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736212
WATCHDOG TIMER DEVICE AND METHODS THEREOF Apr 16, 2007 Abandoned
Array ( [id] => 4665431 [patent_doc_number] => 20080256338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Techniques for Storing Instructions and Related Information in a Memory Hierarchy' [patent_app_type] => utility [patent_app_number] => 11/735567 [patent_app_country] => US [patent_app_date] => 2007-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 14673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20080256338.pdf [firstpage_image] =>[orig_patent_app_number] => 11735567 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735567
Techniques for storing instructions and related information in a memory hierarchy Apr 15, 2007 Issued
Array ( [id] => 5102814 [patent_doc_number] => 20070186076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'DATA PIPELINE TRANSPORT SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/735390 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3938 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20070186076.pdf [firstpage_image] =>[orig_patent_app_number] => 11735390 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735390
DATA PIPELINE TRANSPORT SYSTEM Apr 12, 2007 Abandoned
Array ( [id] => 5226713 [patent_doc_number] => 20070255980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'METHOD AND APPARATUS FOR DETECTING FALSE OPERATION OF COMPUTER' [patent_app_type] => utility [patent_app_number] => 11/734361 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8289 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20070255980.pdf [firstpage_image] =>[orig_patent_app_number] => 11734361 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734361
Method and apparatus for detecting false operation of computer Apr 11, 2007 Issued
Array ( [id] => 4665440 [patent_doc_number] => 20080256347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PATH-CORRELATED INDIRECT ADDRESS PREDICTIONS' [patent_app_type] => utility [patent_app_number] => 11/734519 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6248 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20080256347.pdf [firstpage_image] =>[orig_patent_app_number] => 11734519 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734519
Method, system, and computer program product for path-correlated indirect address predictions Apr 11, 2007 Issued
Array ( [id] => 8260002 [patent_doc_number] => 08209520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Expanded functionality of processor operations within a fixed width instruction encoding' [patent_app_type] => utility [patent_app_number] => 11/725631 [patent_app_country] => US [patent_app_date] => 2007-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11725631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/725631
Expanded functionality of processor operations within a fixed width instruction encoding Mar 19, 2007 Issued
Array ( [id] => 5232408 [patent_doc_number] => 20070294517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'METHOD AND DEVICE FOR SAVING AND RESTORING A SET OF REGISTERS OF A MICROPROCESSOR IN AN INTERRUPTIBLE MANNER' [patent_app_type] => utility [patent_app_number] => 11/567998 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5919 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20070294517.pdf [firstpage_image] =>[orig_patent_app_number] => 11567998 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/567998
Method and device for saving and restoring a set of registers of a microprocessor in an interruptible manner Dec 6, 2006 Issued
Array ( [id] => 28236 [patent_doc_number] => 07797517 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-14 [patent_title] => 'Trace optimization via fusing operations of a target architecture operation set' [patent_app_type] => utility [patent_app_number] => 11/561274 [patent_app_country] => US [patent_app_date] => 2006-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 21898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/797/07797517.pdf [firstpage_image] =>[orig_patent_app_number] => 11561274 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/561274
Trace optimization via fusing operations of a target architecture operation set Nov 16, 2006 Issued
Array ( [id] => 128036 [patent_doc_number] => 07707396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Data processing system, processor and method of data processing having improved branch target address cache' [patent_app_type] => utility [patent_app_number] => 11/561002 [patent_app_country] => US [patent_app_date] => 2006-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6172 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/707/07707396.pdf [firstpage_image] =>[orig_patent_app_number] => 11561002 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/561002
Data processing system, processor and method of data processing having improved branch target address cache Nov 16, 2006 Issued
Array ( [id] => 4905557 [patent_doc_number] => 20080114971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'BRANCH HISTORY TABLE FOR DEBUG' [patent_app_type] => utility [patent_app_number] => 11/559426 [patent_app_country] => US [patent_app_date] => 2006-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5957 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20080114971.pdf [firstpage_image] =>[orig_patent_app_number] => 11559426 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/559426
BRANCH HISTORY TABLE FOR DEBUG Nov 13, 2006 Abandoned
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