Search

David L. Singer

Examiner (ID: 2521, Phone: (303)297-4317 , Office: P/2856 )

Most Active Art Unit
2856
Art Unit(s)
2856, 2855
Total Applications
563
Issued Applications
377
Pending Applications
62
Abandoned Applications
138

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16178907 [patent_doc_number] => 20200225875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => MEMORY SYSTEM AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/711076 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711076 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711076
Memory system and operation method thereof Dec 10, 2019 Issued
Array ( [id] => 18826781 [patent_doc_number] => 11842057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Seamless creation of raid arrays with optimized boot time [patent_app_type] => utility [patent_app_number] => 16/707600 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707600
Seamless creation of raid arrays with optimized boot time Dec 8, 2019 Issued
Array ( [id] => 16615859 [patent_doc_number] => 20210034512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/702508 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16702508 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/702508
Memory controller and method of operating the same Dec 2, 2019 Issued
Array ( [id] => 16401497 [patent_doc_number] => 20200342355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/701990 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701990 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/701990
Controller and operating method thereof Dec 2, 2019 Issued
Array ( [id] => 17151138 [patent_doc_number] => 11144215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Method, apparatus and electronic device for controlling memory access [patent_app_type] => utility [patent_app_number] => 16/697954 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7275 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/697954
Method, apparatus and electronic device for controlling memory access Nov 26, 2019 Issued
Array ( [id] => 15653763 [patent_doc_number] => 20200089412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => HANDLING CACHE AND NON-VOLATILE STORAGE (NVS) OUT OF SYNC WRITES [patent_app_type] => utility [patent_app_number] => 16/690724 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690724
Handling cache and non-volatile storage (NVS) out of sync writes Nov 20, 2019 Issued
Array ( [id] => 15622781 [patent_doc_number] => 20200081795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SYSTEM AND METHOD FOR ANALYZING APPLICATION MAXIMUM PARALLEL CLONE SESSIONS FOR STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 16/685614 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16685614 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/685614
System and method for analyzing application maximum parallel clone sessions for storage devices Nov 14, 2019 Issued
Array ( [id] => 16957997 [patent_doc_number] => 11061865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Block allocation for low latency file systems [patent_app_type] => utility [patent_app_number] => 16/678969 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 40961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678969 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678969
Block allocation for low latency file systems Nov 7, 2019 Issued
Array ( [id] => 16615882 [patent_doc_number] => 20210034535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => DATA STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/677907 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677907 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/677907
Data storage device and operating method thereof Nov 7, 2019 Issued
Array ( [id] => 18645002 [patent_doc_number] => 11769076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Memory sub-system with a virtualized bus and internal logic to perform a machine learning operation [patent_app_type] => utility [patent_app_number] => 16/601386 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 17209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601386 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601386
Memory sub-system with a virtualized bus and internal logic to perform a machine learning operation Oct 13, 2019 Issued
Array ( [id] => 16116127 [patent_doc_number] => 20200210086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => STORAGE SYSTEM AND DATA MANAGEMENT METHOD OF STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/568033 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568033 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568033
Storage system and data management method of storage system Sep 10, 2019 Issued
Array ( [id] => 17605778 [patent_doc_number] => 11334266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Memory system and method for controlling nonvolatile memory [patent_app_type] => utility [patent_app_number] => 16/564364 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 16523 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564364 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564364
Memory system and method for controlling nonvolatile memory Sep 8, 2019 Issued
Array ( [id] => 16630826 [patent_doc_number] => 20210049479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => STORAGE AND ACCESS OF NEURAL NETWORK INPUTS IN AUTOMOTIVE PREDICTIVE MAINTENANCE [patent_app_type] => utility [patent_app_number] => 16/538073 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538073 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/538073
Storage and access of neural network inputs in automotive predictive maintenance Aug 11, 2019 Issued
Array ( [id] => 18330653 [patent_doc_number] => 11635893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Communications between processors and storage devices in automotive predictive maintenance implemented via artificial neural networks [patent_app_type] => utility [patent_app_number] => 16/538087 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 15869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538087 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/538087
Communications between processors and storage devices in automotive predictive maintenance implemented via artificial neural networks Aug 11, 2019 Issued
Array ( [id] => 16615876 [patent_doc_number] => 20210034529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => DYNAMICALLY ADJUSTING PREFETCH DEPTH [patent_app_type] => utility [patent_app_number] => 16/528917 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528917 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528917
Dynamically adjusting prefetch depth Jul 31, 2019 Issued
Array ( [id] => 17179965 [patent_doc_number] => 11157207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Apparatus and method for engaging plural memory system with each other to store data [patent_app_type] => utility [patent_app_number] => 16/527670 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 22749 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527670
Apparatus and method for engaging plural memory system with each other to store data Jul 30, 2019 Issued
Array ( [id] => 15458753 [patent_doc_number] => 20200042201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => MANAGING PARTIAL SUPERBLOCKS IN A NAND DEVICE [patent_app_type] => utility [patent_app_number] => 16/506372 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506372
Managing partial superblocks in a NAND device Jul 8, 2019 Issued
Array ( [id] => 16543170 [patent_doc_number] => 20200409585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => SYSTEM AND METHOD TO TRACK PHYSICAL ADDRESS ACCESSES BY A CPU OR DEVICE [patent_app_type] => utility [patent_app_number] => 16/458013 [patent_app_country] => US [patent_app_date] => 2019-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458013 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458013
System and method to track physical address accesses by a CPU or device Jun 28, 2019 Issued
Array ( [id] => 15027325 [patent_doc_number] => 20190324667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => IDENTIFYING PROCESSOR ATTRIBUTES BASED ON DETECTING A GUARDED STORAGE EVENT [patent_app_type] => utility [patent_app_number] => 16/457398 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457398 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/457398
Identifying processor attributes based on detecting a guarded storage event Jun 27, 2019 Issued
Array ( [id] => 16527261 [patent_doc_number] => 20200401341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => Storage System and Method for Memory Backlog Hinting for Variable Capacity [patent_app_type] => utility [patent_app_number] => 16/444461 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444461 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444461
Storage system and method for memory backlog hinting for variable capacity Jun 17, 2019 Issued
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