Array
(
[id] => 3971151
[patent_doc_number] => 05901098
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-04
[patent_title] => 'Ground noise isolation circuit for semiconductor memory device and method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/885840
[patent_app_country] => US
[patent_app_date] => 1997-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 2859
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/901/05901098.pdf
[firstpage_image] =>[orig_patent_app_number] => 885840
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/885840 | Ground noise isolation circuit for semiconductor memory device and method thereof | Jun 29, 1997 | Issued |
Array
(
[id] => 3797839
[patent_doc_number] => 05822236
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Analog FIFO memory and switching device having a reset operation'
[patent_app_type] => 1
[patent_app_number] => 8/863209
[patent_app_country] => US
[patent_app_date] => 1997-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 43
[patent_no_of_words] => 13748
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822236.pdf
[firstpage_image] =>[orig_patent_app_number] => 863209
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/863209 | Analog FIFO memory and switching device having a reset operation | May 26, 1997 | Issued |
Array
(
[id] => 3774775
[patent_doc_number] => 05844836
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell'
[patent_app_type] => 1
[patent_app_number] => 8/822518
[patent_app_country] => US
[patent_app_date] => 1997-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4191
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844836.pdf
[firstpage_image] =>[orig_patent_app_number] => 822518
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/822518 | Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell | Mar 23, 1997 | Issued |
Array
(
[id] => 4194049
[patent_doc_number] => 06021080
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-01
[patent_title] => 'Semiconductor memory device having a voltage converting circuit'
[patent_app_type] => 1
[patent_app_number] => 8/821927
[patent_app_country] => US
[patent_app_date] => 1997-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4183
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/021/06021080.pdf
[firstpage_image] =>[orig_patent_app_number] => 821927
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/821927 | Semiconductor memory device having a voltage converting circuit | Mar 20, 1997 | Issued |