
David Lam
Examiner (ID: 2003, Phone: (571)272-1782 , Office: P/2825 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2825 |
| Total Applications | 2102 |
| Issued Applications | 2016 |
| Pending Applications | 28 |
| Abandoned Applications | 60 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11847341
[patent_doc_number] => 09734897
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-15
[patent_title] => 'SRAM bitcell structures facilitating biasing of pass gate transistors'
[patent_app_type] => utility
[patent_app_number] => 15/397021
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15397021
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/397021 | SRAM bitcell structures facilitating biasing of pass gate transistors | Jan 2, 2017 | Issued |
Array
(
[id] => 15414363
[patent_doc_number] => 20200027504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-23
[patent_title] => SEMICONDUCTOR MEMORY DEVICES WITH BALLASTS
[patent_app_type] => utility
[patent_app_number] => 16/465967
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 16/465967 | Resistive memory devices with transition metal dichalcogenide (TMD) materials as ballast resistors to control current flow through the devices | Dec 29, 2016 | Issued |
Array
(
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[patent_issue_date] => 2017-04-20
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, METHOD OF TESTING THE SAME AND METHOD OF OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/394973
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/394973 | Semiconductor memory device, method of testing the same and method of operating the same | Dec 29, 2016 | Issued |
Array
(
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[patent_doc_number] => 09899085
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[patent_issue_date] => 2018-02-20
[patent_title] => 'Non-volatile FeSRAM cell capable of non-destructive read operations'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/393585 | Non-volatile FeSRAM cell capable of non-destructive read operations | Dec 28, 2016 | Issued |
Array
(
[id] => 13640303
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[patent_issue_date] => 2017-12-19
[patent_title] => Synchronization of data transmission with a clock signal after a memory mode switch
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Array
(
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[patent_issue_date] => 2017-10-10
[patent_title] => 'Low voltage selftime tracking circuitry for write assist based memory operation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/381501 | Low voltage selftime tracking circuitry for write assist based memory operation | Dec 15, 2016 | Issued |
Array
(
[id] => 13667473
[patent_doc_number] => 10163916
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[patent_issue_date] => 2018-12-25
[patent_title] => Compact anti-fuse memory cell using CMOS process
[patent_app_type] => utility
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/382307 | Compact anti-fuse memory cell using CMOS process | Dec 15, 2016 | Issued |
Array
(
[id] => 11608369
[patent_doc_number] => 20170125672
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[patent_issue_date] => 2017-05-04
[patent_title] => 'STORAGE DEVICE AND STORAGE UNIT'
[patent_app_type] => utility
[patent_app_number] => 15/378130
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/378130 | STORAGE DEVICE AND STORAGE UNIT | Dec 13, 2016 | Abandoned |
Array
(
[id] => 11517250
[patent_doc_number] => 20170084324
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[patent_issue_date] => 2017-03-23
[patent_title] => 'MEMORY DEVICE WITH TIMING OVERLAP MODE'
[patent_app_type] => utility
[patent_app_number] => 15/370114
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/370114 | Memory system with timing overlap mode for activate and precharge operations | Dec 5, 2016 | Issued |
Array
(
[id] => 13878239
[patent_doc_number] => 20190035460
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[patent_kind] => A1
[patent_issue_date] => 2019-01-31
[patent_title] => MEMORY CONTROLLER, MEMORY SYSTEM, AND MEMORY CONTROLLER CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 16/072789
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[rel_patent_id] =>[rel_patent_doc_number] =>) 16/072789 | Memory controller and memory system for suppression of fluctuation of voltage drop | Nov 30, 2016 | Issued |
Array
(
[id] => 14332609
[patent_doc_number] => 10297329
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[patent_issue_date] => 2019-05-21
[patent_title] => NAND boosting using dynamic ramping of word line voltages
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Array
(
[id] => 11475817
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[patent_title] => '3DIC SYSTEM WITH MEMORY'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/351389 | 3DIC based system with memory cells and transistors | Nov 13, 2016 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/348009 | Method of fabricating a three-dimensional semiconductor memory device having a plurality of memory blocks on a peripheral logic structure | Nov 9, 2016 | Issued |
Array
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[patent_title] => Cell disturb prevention using a leaker device to reduce excess charge from an electronic device
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Array
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/244947 | Power Driven Optimization For Flash Memory | Aug 22, 2016 | Abandoned |