Search

David Lam

Examiner (ID: 2003, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2825
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10877865 [patent_doc_number] => 08902657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Semiconductor memory device and controller' [patent_app_type] => utility [patent_app_number] => 13/837814 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 73 [patent_no_of_words] => 23672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13837814 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/837814
Semiconductor memory device and controller Mar 14, 2013 Issued
Array ( [id] => 9733300 [patent_doc_number] => 20140269009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DRAM WITH PULSED SENSE AMP' [patent_app_type] => utility [patent_app_number] => 13/839174 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2723 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13839174 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/839174
DRAM with pulse sense amp Mar 14, 2013 Issued
Array ( [id] => 10899852 [patent_doc_number] => 08923081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Semiconductor memory system and operating method thereof' [patent_app_type] => utility [patent_app_number] => 13/830166 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3792 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830166 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830166
Semiconductor memory system and operating method thereof Mar 13, 2013 Issued
Array ( [id] => 9733367 [patent_doc_number] => 20140269075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => '2T AND FLASH MEMORY ARRAY' [patent_app_type] => utility [patent_app_number] => 13/827880 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827880
2T and flash memory array Mar 13, 2013 Issued
Array ( [id] => 9337209 [patent_doc_number] => 20140063991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/830562 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5960 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830562
Semiconductor device and operation method thereof Mar 13, 2013 Issued
Array ( [id] => 9779640 [patent_doc_number] => 08854855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Semiconductor memory device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/830594 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 13408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830594 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830594
Semiconductor memory device and method for manufacturing the same Mar 13, 2013 Issued
Array ( [id] => 9712608 [patent_doc_number] => 08837193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Memory' [patent_app_type] => utility [patent_app_number] => 13/830472 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6305 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830472 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830472
Memory Mar 13, 2013 Issued
Array ( [id] => 9959620 [patent_doc_number] => 09007834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Nonvolatile memory with split substrate select gates and hierarchical bitline configuration' [patent_app_type] => utility [patent_app_number] => 13/830054 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 12735 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830054 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830054
Nonvolatile memory with split substrate select gates and hierarchical bitline configuration Mar 13, 2013 Issued
Array ( [id] => 9536210 [patent_doc_number] => 20140160856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND PROGRAM METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/830780 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830780 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830780
Semiconductor memory device and program method thereof Mar 13, 2013 Issued
Array ( [id] => 9337169 [patent_doc_number] => 20140063951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, OPERATING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/829294 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6289 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13829294 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/829294
Semiconductor memory device, operating method thereof, and memory system including the same Mar 13, 2013 Issued
Array ( [id] => 10846093 [patent_doc_number] => 08873284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Method and system for program scheduling in a multi-layer memory' [patent_app_type] => utility [patent_app_number] => 13/827204 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 39 [patent_no_of_words] => 21392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827204
Method and system for program scheduling in a multi-layer memory Mar 13, 2013 Issued
Array ( [id] => 10889423 [patent_doc_number] => 08913425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Phase change memory mask' [patent_app_type] => utility [patent_app_number] => 13/796462 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6805 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13796462 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/796462
Phase change memory mask Mar 11, 2013 Issued
Array ( [id] => 10877871 [patent_doc_number] => 08902663 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-02 [patent_title] => 'Method of maintaining a memory state' [patent_app_type] => utility [patent_app_number] => 13/792202 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 133 [patent_figures_cnt] => 149 [patent_no_of_words] => 26090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13792202 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/792202
Method of maintaining a memory state Mar 10, 2013 Issued
Array ( [id] => 10889419 [patent_doc_number] => 08913421 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Writing to a memory cell' [patent_app_type] => utility [patent_app_number] => 13/793404 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5440 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13793404 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/793404
Writing to a memory cell Mar 10, 2013 Issued
Array ( [id] => 9705659 [patent_doc_number] => 08830739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Non-volatile memory device having multi-level cells and method of forming the same' [patent_app_type] => utility [patent_app_number] => 13/791970 [patent_app_country] => US [patent_app_date] => 2013-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 43 [patent_no_of_words] => 12533 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13791970 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/791970
Non-volatile memory device having multi-level cells and method of forming the same Mar 8, 2013 Issued
Array ( [id] => 9337184 [patent_doc_number] => 20140063966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'PROGRAMMING METHOD OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/773291 [patent_app_country] => US [patent_app_date] => 2013-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6234 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13773291 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/773291
Programming method of nonvolatile memory device Feb 20, 2013 Issued
Array ( [id] => 9851666 [patent_doc_number] => 08953405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Switching circuit' [patent_app_type] => utility [patent_app_number] => 13/765475 [patent_app_country] => US [patent_app_date] => 2013-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13765475 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/765475
Switching circuit Feb 11, 2013 Issued
Array ( [id] => 10544285 [patent_doc_number] => 09269417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Memory refresh management' [patent_app_type] => utility [patent_app_number] => 13/761385 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6395 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761385 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761385
Memory refresh management Feb 6, 2013 Issued
Array ( [id] => 10893906 [patent_doc_number] => 08917533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Circuit and system for testing a one-time programmable (OTP) memory' [patent_app_type] => utility [patent_app_number] => 13/761057 [patent_app_country] => US [patent_app_date] => 2013-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6721 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761057 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761057
Circuit and system for testing a one-time programmable (OTP) memory Feb 5, 2013 Issued
Array ( [id] => 9305243 [patent_doc_number] => 20140043917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/758119 [patent_app_country] => US [patent_app_date] => 2013-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13758119 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/758119
Non-volatile semiconductor storage device Feb 3, 2013 Issued
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