
David Lam
Examiner (ID: 2003, Phone: (571)272-1782 , Office: P/2825 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2825 |
| Total Applications | 2102 |
| Issued Applications | 2016 |
| Pending Applications | 28 |
| Abandoned Applications | 60 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9640917
[patent_doc_number] => 20140219028
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[patent_issue_date] => 2014-08-07
[patent_title] => 'Compensation Loop for Read Voltage Adaptation'
[patent_app_type] => utility
[patent_app_number] => 13/757027
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/757027 | Compensation loop for read voltage adaptation | Jan 31, 2013 | Issued |
Array
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[patent_doc_number] => 08885405
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[patent_issue_date] => 2014-11-11
[patent_title] => 'Flash memory and associated programming method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/755045 | Flash memory and associated programming method | Jan 30, 2013 | Issued |
Array
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[patent_issue_date] => 2014-05-15
[patent_title] => 'BIT LINE RESISTANCE COMPENSATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/755905 | Bit line resistance compensation | Jan 30, 2013 | Issued |
Array
(
[id] => 9614802
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[patent_kind] => A1
[patent_issue_date] => 2014-07-24
[patent_title] => 'CAPACITIVE COUPLED SENSE AMPLIFIER BIASED AT MAXIMUM GAIN POINT'
[patent_app_type] => utility
[patent_app_number] => 13/746653
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/746653 | Capacitive coupled sense amplifier biased at maximum gain point | Jan 21, 2013 | Issued |
Array
(
[id] => 9402105
[patent_doc_number] => 08692158
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[patent_title] => 'Portable weld cooling systems'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/743290 | Portable weld cooling systems | Jan 15, 2013 | Issued |
Array
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[patent_title] => 'STACKED MEMORY WITH REDUNDANCY'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/728330 | Stacked memory with redundancy | Dec 26, 2012 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/728134 | DRAM and access and operating method thereof | Dec 26, 2012 | Issued |
Array
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[id] => 10865556
[patent_doc_number] => 08891273
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[patent_issue_date] => 2014-11-18
[patent_title] => 'Pseudo-NOR cell for ternary content addressable memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/727494 | Pseudo-NOR cell for ternary content addressable memory | Dec 25, 2012 | Issued |
Array
(
[id] => 9337162
[patent_doc_number] => 20140063944
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME'
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Array
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[patent_title] => 'Chip with embedded non-volatile memory and testing method therefor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/727046 | Chip with embedded non-volatile memory and testing method therefor | Dec 25, 2012 | Issued |
Array
(
[id] => 9559644
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[patent_title] => 'PROGRAMMABLE RESISTANCE-MODULATED WRITE ASSIST FOR A MEMORY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/726800 | Programmable resistance-modulated write assist for a memory device | Dec 25, 2012 | Issued |
Array
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[id] => 9559647
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[patent_title] => 'METHOD AND APPARATUS FOR ALIGNING A CLOCK SIGNAL AND A DATA STROBE SIGNAL IN A MEMORY SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/726392 | Method and apparatus for aligning a clock signal and a data strobe signal in a memory system | Dec 23, 2012 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/693834 | Semiconductor device having skew detection circuit measuring skew between clock signal and data strobe signal | Dec 3, 2012 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/693808 | Sequential access memory with master-slave latch pairs and method of operating | Dec 3, 2012 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/990209 | Variable resistance nonvolatile memory element writing method and variable resistance nonvolatile memory device | Nov 20, 2012 | Issued |