Search

David Lam

Examiner (ID: 19604)

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2825
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9133470 [patent_doc_number] => 20130294184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'SELF-REPAIR LOGIC FOR STACKED MEMORY ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/976405 [patent_app_country] => US [patent_app_date] => 2011-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6843 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976405
Self-repair logic for stacked memory architecture Dec 22, 2011 Issued
Array ( [id] => 11787332 [patent_doc_number] => 09396787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-19 [patent_title] => 'Memory operations using system thermal sensor data' [patent_app_type] => utility [patent_app_number] => 13/997975 [patent_app_country] => US [patent_app_date] => 2011-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5880 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997975 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997975
Memory operations using system thermal sensor data Dec 22, 2011 Issued
Array ( [id] => 9614807 [patent_doc_number] => 20140204663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-24 [patent_title] => 'EFFICIENT PCMS REFRESH MECHANISM' [patent_app_type] => utility [patent_app_number] => 13/997661 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 16187 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997661 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997661
Efficient PCMS refresh mechanism Dec 21, 2011 Issued
Array ( [id] => 8983521 [patent_doc_number] => 08514645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Current-mode sense amplifier for high-speed sensing' [patent_app_type] => utility [patent_app_number] => 13/324402 [patent_app_country] => US [patent_app_date] => 2011-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2813 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324402 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/324402
Current-mode sense amplifier for high-speed sensing Dec 12, 2011 Issued
Array ( [id] => 8529227 [patent_doc_number] => 08305809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Methods, devices, and systems for dealing with threshold voltage change in memory devices' [patent_app_type] => utility [patent_app_number] => 13/305164 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 8325 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13305164 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/305164
Methods, devices, and systems for dealing with threshold voltage change in memory devices Nov 27, 2011 Issued
Array ( [id] => 8878714 [patent_doc_number] => 08473698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Converting LUNs into files or files into LUNs in real' [patent_app_type] => utility [patent_app_number] => 13/298835 [patent_app_country] => US [patent_app_date] => 2011-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 11340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13298835 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/298835
Converting LUNs into files or files into LUNs in real Nov 16, 2011 Issued
Array ( [id] => 8813297 [patent_doc_number] => 20130114342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'DEFECTIVE WORD LINE DETECTION' [patent_app_type] => utility [patent_app_number] => 13/292556 [patent_app_country] => US [patent_app_date] => 2011-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 19608 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13292556 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/292556
Defective word line detection Nov 8, 2011 Issued
Array ( [id] => 8616547 [patent_doc_number] => 20130021859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'MECHANISMS FOR BUILT-IN SELF REPAIR OF MEMORY DEVICES USING FAILED BIT MAPS AND OBVIOUS REPAIRS' [patent_app_type] => utility [patent_app_number] => 13/291620 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291620 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291620
Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs Nov 7, 2011 Issued
Array ( [id] => 8813301 [patent_doc_number] => 20130114346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'METHOD OF OPERATING A FLASH EEPROM MEMORY' [patent_app_type] => utility [patent_app_number] => 13/291105 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291105 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291105
Method of operating a flash EEPROM memory Nov 7, 2011 Issued
Array ( [id] => 8482083 [patent_doc_number] => 20120281490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/291850 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5760 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291850
SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME Nov 7, 2011 Abandoned
Array ( [id] => 8616548 [patent_doc_number] => 20130021860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'MECHANISMS FOR BUILT-IN SELF REPAIR OF MEMORY DEVICES USING FAILED BIT MAPS AND OBVIOUS REPAIRS' [patent_app_type] => utility [patent_app_number] => 13/291707 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6281 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291707 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291707
Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs Nov 7, 2011 Issued
Array ( [id] => 8182590 [patent_doc_number] => 20120113737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'ELECTRONIC DEVICE AND MEMORY DEVICE OF CURRENT COMPENSATION' [patent_app_type] => utility [patent_app_number] => 13/291492 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20120113737.pdf [firstpage_image] =>[orig_patent_app_number] => 13291492 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291492
Electronic device and memory device of current compensation Nov 7, 2011 Issued
Array ( [id] => 8813298 [patent_doc_number] => 20130114343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SEMICONDUCTOR DEVICE WITH ONE-TIME PROGRAMMABLE MEMORY CELL INCLUDING ANTI-FUSE WITH METAL/POLYCIDE GATE' [patent_app_type] => utility [patent_app_number] => 13/291792 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291792 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291792
Semiconductor device with one-time programmable memory cell including anti-fuse with metal/polycide gate Nov 7, 2011 Issued
Array ( [id] => 8195340 [patent_doc_number] => 20120120727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'METHOD OF PROVIDING AN OPERATING VOLTAGE IN A MEMORY DEVICE AND A MEMORY CONTROLLER FOR THE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/289282 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5822 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20120120727.pdf [firstpage_image] =>[orig_patent_app_number] => 13289282 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289282
Method of providing an operating voltage in a memory device and a memory controller for the memory device Nov 3, 2011 Issued
Array ( [id] => 8871845 [patent_doc_number] => 08467227 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-18 [patent_title] => 'Hetero resistive switching material layer in RRAM device and method' [patent_app_type] => utility [patent_app_number] => 13/290024 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 8754 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290024 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290024
Hetero resistive switching material layer in RRAM device and method Nov 3, 2011 Issued
Array ( [id] => 8813296 [patent_doc_number] => 20130114341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'Method and Apparatus for Indicating Bad Memory Areas' [patent_app_type] => utility [patent_app_number] => 13/289944 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5002 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289944
Method and apparatus for indicating bad memory areas Nov 3, 2011 Issued
Array ( [id] => 8539362 [patent_doc_number] => 08315085 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-11-20 [patent_title] => 'SRAM timing tracking circuit' [patent_app_type] => utility [patent_app_number] => 13/289030 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 5857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289030 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289030
SRAM timing tracking circuit Nov 3, 2011 Issued
Array ( [id] => 8691557 [patent_doc_number] => 08391088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Pseudo-open drain type output driver having de-emphasis function, semiconductor memory device, and control method thereof' [patent_app_type] => utility [patent_app_number] => 13/289240 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 9206 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289240 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289240
Pseudo-open drain type output driver having de-emphasis function, semiconductor memory device, and control method thereof Nov 3, 2011 Issued
Array ( [id] => 8471284 [patent_doc_number] => 08300473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Non-volatile memory with improved sensing by reducing source line current' [patent_app_type] => utility [patent_app_number] => 13/285698 [patent_app_country] => US [patent_app_date] => 2011-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 42 [patent_no_of_words] => 22871 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13285698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/285698
Non-volatile memory with improved sensing by reducing source line current Oct 30, 2011 Issued
Array ( [id] => 9256032 [patent_doc_number] => 08619460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Nonvolatile memory device and method for programming nonvolatile memory element' [patent_app_type] => utility [patent_app_number] => 13/509616 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 20133 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13509616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/509616
Nonvolatile memory device and method for programming nonvolatile memory element Oct 25, 2011 Issued
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