
David Lam
Examiner (ID: 9389, Phone: (571)272-1782 , Office: P/2825 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2825 |
| Total Applications | 2102 |
| Issued Applications | 2016 |
| Pending Applications | 28 |
| Abandoned Applications | 60 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8561052
[patent_doc_number] => 08335119
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[patent_issue_date] => 2012-12-18
[patent_title] => 'Method of inspecting memory cell'
[patent_app_type] => utility
[patent_app_number] => 13/276952
[patent_app_country] => US
[patent_app_date] => 2011-10-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/276952 | Method of inspecting memory cell | Oct 18, 2011 | Issued |
Array
(
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[patent_doc_number] => 08654561
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[patent_issue_date] => 2014-02-18
[patent_title] => 'Read methods, circuits and systems for memory devices'
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Array
(
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[patent_issue_date] => 2013-03-19
[patent_title] => 'Electronic device for monitoring a supply voltage'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/276160 | Electronic device for monitoring a supply voltage | Oct 17, 2011 | Issued |
Array
(
[id] => 8766276
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[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'COLLISION PREVENTION IN A DUAL PORT MEMORY'
[patent_app_type] => utility
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[patent_app_date] => 2011-10-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/275920 | Collision prevention in a dual port memory | Oct 17, 2011 | Issued |
Array
(
[id] => 8404570
[patent_doc_number] => 20120236622
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[patent_title] => 'NON-VOLATILE GRAPHENE-DRUM MEMORY CHIP'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/512844 | Non-volatile graphene-drum memory chip | Oct 5, 2011 | Issued |
Array
(
[id] => 8877270
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[patent_title] => 'Phase change random access memory device'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/216562 | Semiconductor device | Aug 23, 2011 | Issued |
Array
(
[id] => 8682887
[patent_doc_number] => 20130051171
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[patent_title] => 'MEMORY REFRESH METHODS, MEMORY SECTION CONTROL CIRCUITS, AND APPARATUSES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/217070 | Memory refresh methods, memory section control circuits, and apparatuses | Aug 23, 2011 | Issued |
Array
(
[id] => 7566205
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[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/193968 | Nonvolatile semiconductor memory | Jul 28, 2011 | Issued |
Array
(
[id] => 7585553
[patent_doc_number] => 20110280063
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[patent_title] => 'SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS'
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[firstpage_image] =>[orig_patent_app_number] => 13193523
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/193523 | Spintronic devices with integrated transistors | Jul 27, 2011 | Issued |
Array
(
[id] => 7585550
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[patent_title] => 'WRITE BUFFERING SYSTEMS FOR ACCESSING MULTIPLE LAYERS OF MEMORY IN INTEGRATED CIRCUITS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/191232 | Write buffering systems for accessing multiple layers of memory in integrated circuits | Jul 25, 2011 | Issued |
Array
(
[id] => 9274654
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[patent_title] => 'Non-volatile memory saving cell information in a non-volatile memory array'
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Array
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Array
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Array
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Array
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Array
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Array
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