Search

David Lam

Examiner (ID: 9389, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827, 2825
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8944985 [patent_doc_number] => 08498168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'Test method for screening local bit-line defects in a memory array' [patent_app_type] => utility [patent_app_number] => 13/085942 [patent_app_country] => US [patent_app_date] => 2011-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4549 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13085942 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/085942
Test method for screening local bit-line defects in a memory array Apr 12, 2011 Issued
Array ( [id] => 8258810 [patent_doc_number] => 08208315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Method and system to access memory' [patent_app_type] => utility [patent_app_number] => 13/052810 [patent_app_country] => US [patent_app_date] => 2011-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6564 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13052810 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/052810
Method and system to access memory Mar 20, 2011 Issued
Array ( [id] => 8234128 [patent_doc_number] => 08199582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'NAND-type flash memory and NAND-type flash memory controlling method' [patent_app_type] => utility [patent_app_number] => 13/043624 [patent_app_country] => US [patent_app_date] => 2011-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5520 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/199/08199582.pdf [firstpage_image] =>[orig_patent_app_number] => 13043624 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043624
NAND-type flash memory and NAND-type flash memory controlling method Mar 8, 2011 Issued
Array ( [id] => 8234106 [patent_doc_number] => 08199558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Apparatus for variable resistive memory punchthrough access method' [patent_app_type] => utility [patent_app_number] => 13/042508 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3967 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/199/08199558.pdf [firstpage_image] =>[orig_patent_app_number] => 13042508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/042508
Apparatus for variable resistive memory punchthrough access method Mar 7, 2011 Issued
Array ( [id] => 7765486 [patent_doc_number] => 08116143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Method of erasing memory cell' [patent_app_type] => utility [patent_app_number] => 13/040855 [patent_app_country] => US [patent_app_date] => 2011-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/116/08116143.pdf [firstpage_image] =>[orig_patent_app_number] => 13040855 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/040855
Method of erasing memory cell Mar 3, 2011 Issued
Array ( [id] => 6078139 [patent_doc_number] => 20110141800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'PHASE-CHANGE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/029591 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5520 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20110141800.pdf [firstpage_image] =>[orig_patent_app_number] => 13029591 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/029591
Phase-change memory device Feb 16, 2011 Issued
Array ( [id] => 4605584 [patent_doc_number] => 07986567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-26 [patent_title] => 'Read buffering systems for accessing multiple layers of memory in integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/931966 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6973 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/986/07986567.pdf [firstpage_image] =>[orig_patent_app_number] => 12931966 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/931966
Read buffering systems for accessing multiple layers of memory in integrated circuits Feb 14, 2011 Issued
Array ( [id] => 6181097 [patent_doc_number] => 20110122716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD OF DETERMINING REFRESH CYCLE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/015833 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7325 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122716.pdf [firstpage_image] =>[orig_patent_app_number] => 13015833 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/015833
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD OF DETERMINING REFRESH CYCLE THEREOF Jan 27, 2011 Abandoned
Array ( [id] => 7754046 [patent_doc_number] => 08111532 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-07 [patent_title] => 'Method and apparatus for CAM with redundancy' [patent_app_type] => utility [patent_app_number] => 13/014970 [patent_app_country] => US [patent_app_date] => 2011-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6358 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/111/08111532.pdf [firstpage_image] =>[orig_patent_app_number] => 13014970 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014970
Method and apparatus for CAM with redundancy Jan 26, 2011 Issued
Array ( [id] => 6053007 [patent_doc_number] => 20110109367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME' [patent_app_type] => utility [patent_app_number] => 13/007307 [patent_app_country] => US [patent_app_date] => 2011-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7397 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20110109367.pdf [firstpage_image] =>[orig_patent_app_number] => 13007307 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/007307
Multi-phase duty-cycle corrected clock signal generator and memory having same Jan 13, 2011 Issued
Array ( [id] => 9456792 [patent_doc_number] => 08717809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Phase change memory programming method and phase change memory' [patent_app_type] => utility [patent_app_number] => 13/522810 [patent_app_country] => US [patent_app_date] => 2011-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5658 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13522810 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/522810
Phase change memory programming method and phase change memory Jan 10, 2011 Issued
Array ( [id] => 5983261 [patent_doc_number] => 20110096615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'MEMORY DEVICES HAVING REDUNDANT ARRAYS FOR REPAIR' [patent_app_type] => utility [patent_app_number] => 12/985236 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20110096615.pdf [firstpage_image] =>[orig_patent_app_number] => 12985236 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985236
Memory devices having redundant arrays for repair Jan 4, 2011 Issued
Array ( [id] => 7752880 [patent_doc_number] => 20120026800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SEMICONDUCTOR APPARATUS AND METHOD FOR TRANSFERRING CONTROL VOLTAGE' [patent_app_type] => utility [patent_app_number] => 12/982958 [patent_app_country] => US [patent_app_date] => 2010-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4509 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20120026800.pdf [firstpage_image] =>[orig_patent_app_number] => 12982958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982958
Semiconductor apparatus and method for transferring control voltage Dec 30, 2010 Issued
Array ( [id] => 7578851 [patent_doc_number] => 20110292734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/982796 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5880 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0292/20110292734.pdf [firstpage_image] =>[orig_patent_app_number] => 12982796 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982796
METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE Dec 29, 2010 Abandoned
Array ( [id] => 6157365 [patent_doc_number] => 20110157988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/982746 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4343 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20110157988.pdf [firstpage_image] =>[orig_patent_app_number] => 12982746 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982746
Semiconductor memory device and method of operating the same Dec 29, 2010 Issued
Array ( [id] => 6157386 [patent_doc_number] => 20110158001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'PROGRAMMING METHOD FOR NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/982794 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3068 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20110158001.pdf [firstpage_image] =>[orig_patent_app_number] => 12982794 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982794
PROGRAMMING METHOD FOR NONVOLATILE MEMORY DEVICE Dec 29, 2010 Abandoned
Array ( [id] => 8702697 [patent_doc_number] => 08395924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Non-volatile memory device and method for programming the same' [patent_app_type] => utility [patent_app_number] => 12/982756 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9559 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982756 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982756
Non-volatile memory device and method for programming the same Dec 29, 2010 Issued
Array ( [id] => 7719078 [patent_doc_number] => 20120008413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'METHOD FOR OPERATING SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/982654 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20120008413.pdf [firstpage_image] =>[orig_patent_app_number] => 12982654 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982654
Method for operating semiconductor memory device Dec 29, 2010 Issued
Array ( [id] => 8691552 [patent_doc_number] => 08391083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Semiconductor device capable of detecting defect of column selection line' [patent_app_type] => utility [patent_app_number] => 12/926996 [patent_app_country] => US [patent_app_date] => 2010-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926996 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926996
Semiconductor device capable of detecting defect of column selection line Dec 21, 2010 Issued
Array ( [id] => 8539400 [patent_doc_number] => 08315123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Wordline voltage control within a memory' [patent_app_type] => utility [patent_app_number] => 12/926964 [patent_app_country] => US [patent_app_date] => 2010-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4573 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926964 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926964
Wordline voltage control within a memory Dec 19, 2010 Issued
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