
David Lam
Examiner (ID: 19604)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2827, 2825 |
| Total Applications | 2102 |
| Issued Applications | 2016 |
| Pending Applications | 28 |
| Abandoned Applications | 60 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8539400
[patent_doc_number] => 08315123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-20
[patent_title] => 'Wordline voltage control within a memory'
[patent_app_type] => utility
[patent_app_number] => 12/926964
[patent_app_country] => US
[patent_app_date] => 2010-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4573
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926964
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/926964 | Wordline voltage control within a memory | Dec 19, 2010 | Issued |
Array
(
[id] => 7668202
[patent_doc_number] => 20110317471
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-29
[patent_title] => 'Nonvolatile stacked nand memory'
[patent_app_type] => utility
[patent_app_number] => 12/928396
[patent_app_country] => US
[patent_app_date] => 2010-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 6979
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12928396
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/928396 | Nonvolatile stacked nand memory | Dec 9, 2010 | Issued |
Array
(
[id] => 7536487
[patent_doc_number] => 08050126
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-01
[patent_title] => 'Non-volatile memory with improved sensing by reducing source line current'
[patent_app_type] => utility
[patent_app_number] => 12/965761
[patent_app_country] => US
[patent_app_date] => 2010-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 42
[patent_no_of_words] => 22850
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/050/08050126.pdf
[firstpage_image] =>[orig_patent_app_number] => 12965761
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/965761 | Non-volatile memory with improved sensing by reducing source line current | Dec 9, 2010 | Issued |
Array
(
[id] => 8534720
[patent_doc_number] => 08310879
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-13
[patent_title] => 'Method of programming an electrically programmable and erasable non-volatile memory point, and corresponding memory device'
[patent_app_type] => utility
[patent_app_number] => 12/965152
[patent_app_country] => US
[patent_app_date] => 2010-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 4681
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12965152
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/965152 | Method of programming an electrically programmable and erasable non-volatile memory point, and corresponding memory device | Dec 9, 2010 | Issued |
Array
(
[id] => 8238931
[patent_doc_number] => 20120147666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'PHASE CHANGE MATERIAL CELL WITH STRESS INDUCER LINER'
[patent_app_type] => utility
[patent_app_number] => 12/964980
[patent_app_country] => US
[patent_app_date] => 2010-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5002
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964980
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/964980 | Phase change material cell with stress inducer liner | Dec 9, 2010 | Issued |
Array
(
[id] => 7715146
[patent_doc_number] => 08094488
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-10
[patent_title] => 'Set algorithm for phase change memory cell'
[patent_app_type] => utility
[patent_app_number] => 12/965126
[patent_app_country] => US
[patent_app_date] => 2010-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 7436
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/094/08094488.pdf
[firstpage_image] =>[orig_patent_app_number] => 12965126
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/965126 | Set algorithm for phase change memory cell | Dec 9, 2010 | Issued |
Array
(
[id] => 8644130
[patent_doc_number] => 08369124
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-05
[patent_title] => 'Semiconductor memory apparatus having sense amplifier'
[patent_app_type] => utility
[patent_app_number] => 12/964182
[patent_app_country] => US
[patent_app_date] => 2010-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2637
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964182
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/964182 | Semiconductor memory apparatus having sense amplifier | Dec 8, 2010 | Issued |
Array
(
[id] => 8411445
[patent_doc_number] => 08274847
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-25
[patent_title] => 'Semiconductor system'
[patent_app_type] => utility
[patent_app_number] => 12/964304
[patent_app_country] => US
[patent_app_date] => 2010-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 13129
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964304
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/964304 | Semiconductor system | Dec 8, 2010 | Issued |
Array
(
[id] => 7797123
[patent_doc_number] => 08125833
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-28
[patent_title] => 'Adaptive dynamic reading of flash memories'
[patent_app_type] => utility
[patent_app_number] => 12/964286
[patent_app_country] => US
[patent_app_date] => 2010-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 10253
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/125/08125833.pdf
[firstpage_image] =>[orig_patent_app_number] => 12964286
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/964286 | Adaptive dynamic reading of flash memories | Dec 8, 2010 | Issued |
Array
(
[id] => 9287715
[patent_doc_number] => 08644055
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-04
[patent_title] => 'Nonvolatile memory with enhanced efficiency to address asymetric NVM cells'
[patent_app_type] => utility
[patent_app_number] => 12/963820
[patent_app_country] => US
[patent_app_date] => 2010-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2831
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963820
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/963820 | Nonvolatile memory with enhanced efficiency to address asymetric NVM cells | Dec 8, 2010 | Issued |
Array
(
[id] => 8726910
[patent_doc_number] => 08406044
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-26
[patent_title] => 'Write driver, semiconductor memory apparatus using the same and programming method'
[patent_app_type] => utility
[patent_app_number] => 12/962908
[patent_app_country] => US
[patent_app_date] => 2010-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 4543
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12962908
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/962908 | Write driver, semiconductor memory apparatus using the same and programming method | Dec 7, 2010 | Issued |
Array
(
[id] => 6210868
[patent_doc_number] => 20110134713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-09
[patent_title] => 'Methods circuits devices and systems for operating an array of non-volatile memory cells'
[patent_app_type] => utility
[patent_app_number] => 12/926718
[patent_app_country] => US
[patent_app_date] => 2010-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6683
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0134/20110134713.pdf
[firstpage_image] =>[orig_patent_app_number] => 12926718
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/926718 | Methods circuits devices and systems for operating an array of non-volatile memory cells | Dec 6, 2010 | Issued |
Array
(
[id] => 8226377
[patent_doc_number] => 20120140585
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-07
[patent_title] => 'Retention voltage generation'
[patent_app_type] => utility
[patent_app_number] => 12/926650
[patent_app_country] => US
[patent_app_date] => 2010-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5449
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926650
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/926650 | Retention voltage generation | Nov 30, 2010 | Issued |
Array
(
[id] => 6006018
[patent_doc_number] => 20110058404
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-10
[patent_title] => 'VARIABLE RESISTIVE MEMORY PUNCHTHROUGH ACCESS METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/944790
[patent_app_country] => US
[patent_app_date] => 2010-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3926
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0058/20110058404.pdf
[firstpage_image] =>[orig_patent_app_number] => 12944790
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/944790 | Variable resistive memory punchthrough access method | Nov 11, 2010 | Issued |
Array
(
[id] => 4559605
[patent_doc_number] => 07961497
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-06-14
[patent_title] => 'Variable resistive memory punchthrough access method'
[patent_app_type] => utility
[patent_app_number] => 12/904288
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3928
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/961/07961497.pdf
[firstpage_image] =>[orig_patent_app_number] => 12904288
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904288 | Variable resistive memory punchthrough access method | Oct 13, 2010 | Issued |
Array
(
[id] => 8311802
[patent_doc_number] => 20120188811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-26
[patent_title] => 'ASSOCIATIVE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/499112
[patent_app_country] => US
[patent_app_date] => 2010-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 15997
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13499112
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/499112 | Associative memory | Sep 23, 2010 | Issued |
Array
(
[id] => 5974504
[patent_doc_number] => 20110069551
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-24
[patent_title] => 'Non-Volatile Semiconductor Memory with Page Erase'
[patent_app_type] => utility
[patent_app_number] => 12/888034
[patent_app_country] => US
[patent_app_date] => 2010-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 45
[patent_no_of_words] => 14277
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20110069551.pdf
[firstpage_image] =>[orig_patent_app_number] => 12888034
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/888034 | Non-volatile semiconductor memory with page erase | Sep 21, 2010 | Issued |
Array
(
[id] => 4474597
[patent_doc_number] => 07944742
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-17
[patent_title] => 'Diode assisted switching spin-transfer torque memory unit'
[patent_app_type] => utility
[patent_app_number] => 12/861932
[patent_app_country] => US
[patent_app_date] => 2010-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 4623
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/944/07944742.pdf
[firstpage_image] =>[orig_patent_app_number] => 12861932
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/861932 | Diode assisted switching spin-transfer torque memory unit | Aug 23, 2010 | Issued |
Array
(
[id] => 8117357
[patent_doc_number] => 08159893
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-17
[patent_title] => 'Data flow control in multiple independent port'
[patent_app_type] => utility
[patent_app_number] => 12/851884
[patent_app_country] => US
[patent_app_date] => 2010-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 25
[patent_no_of_words] => 16267
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/159/08159893.pdf
[firstpage_image] =>[orig_patent_app_number] => 12851884
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/851884 | Data flow control in multiple independent port | Aug 5, 2010 | Issued |
Array
(
[id] => 7754128
[patent_doc_number] => 08111567
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-07
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/850736
[patent_app_country] => US
[patent_app_date] => 2010-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 29
[patent_no_of_words] => 16511
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/111/08111567.pdf
[firstpage_image] =>[orig_patent_app_number] => 12850736
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/850736 | Semiconductor device | Aug 4, 2010 | Issued |