Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6459538 [patent_doc_number] => 20100039870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'MEMORY CONTROL CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/539144 [patent_app_country] => US [patent_app_date] => 2009-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5791 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20100039870.pdf [firstpage_image] =>[orig_patent_app_number] => 12539144 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/539144
Memory control circuit and semiconductor integrated circuit incorporating the same Aug 10, 2009 Issued
Array ( [id] => 4540801 [patent_doc_number] => 07872890 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-18 [patent_title] => 'Counter circuit for regular expression search engines' [patent_app_type] => utility [patent_app_number] => 12/538852 [patent_app_country] => US [patent_app_date] => 2009-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 12155 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872890.pdf [firstpage_image] =>[orig_patent_app_number] => 12538852 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/538852
Counter circuit for regular expression search engines Aug 9, 2009 Issued
Array ( [id] => 6620138 [patent_doc_number] => 20100050197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'OPTICAL CARD' [patent_app_type] => utility [patent_app_number] => 12/510178 [patent_app_country] => US [patent_app_date] => 2009-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6385 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20100050197.pdf [firstpage_image] =>[orig_patent_app_number] => 12510178 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/510178
OPTICAL CARD Jul 26, 2009 Abandoned
Array ( [id] => 4590480 [patent_doc_number] => 07852678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Non-volatile memory with improved sensing by reducing source line current' [patent_app_type] => utility [patent_app_number] => 12/507752 [patent_app_country] => US [patent_app_date] => 2009-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 42 [patent_no_of_words] => 22736 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852678.pdf [firstpage_image] =>[orig_patent_app_number] => 12507752 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/507752
Non-volatile memory with improved sensing by reducing source line current Jul 21, 2009 Issued
Array ( [id] => 4503827 [patent_doc_number] => 07948798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-24 [patent_title] => 'Mixed multi-level cell and single level cell storage device' [patent_app_type] => utility [patent_app_number] => 12/507548 [patent_app_country] => US [patent_app_date] => 2009-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7082 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/948/07948798.pdf [firstpage_image] =>[orig_patent_app_number] => 12507548 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/507548
Mixed multi-level cell and single level cell storage device Jul 21, 2009 Issued
Array ( [id] => 4630591 [patent_doc_number] => 08009496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Semiconductor device including asymmetric sense amplifier' [patent_app_type] => utility [patent_app_number] => 12/506352 [patent_app_country] => US [patent_app_date] => 2009-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 6283 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/009/08009496.pdf [firstpage_image] =>[orig_patent_app_number] => 12506352 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/506352
Semiconductor device including asymmetric sense amplifier Jul 20, 2009 Issued
Array ( [id] => 4522084 [patent_doc_number] => 07911821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/505820 [patent_app_country] => US [patent_app_date] => 2009-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6059 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911821.pdf [firstpage_image] =>[orig_patent_app_number] => 12505820 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/505820
Semiconductor memory device Jul 19, 2009 Issued
Array ( [id] => 8204644 [patent_doc_number] => 08189405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Data readout circuit and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/503894 [patent_app_country] => US [patent_app_date] => 2009-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 12889 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189405.pdf [firstpage_image] =>[orig_patent_app_number] => 12503894 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/503894
Data readout circuit and semiconductor memory device Jul 15, 2009 Issued
Array ( [id] => 5486832 [patent_doc_number] => 20090276597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'MEMORY CONTROLLER-ADAPTIVE 1T/2T TIMING CONTROL' [patent_app_type] => utility [patent_app_number] => 12/502628 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20090276597.pdf [firstpage_image] =>[orig_patent_app_number] => 12502628 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502628
Memory controller-adaptive 1T/2T timing control Jul 13, 2009 Issued
Array ( [id] => 6262494 [patent_doc_number] => 20100030955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'MASK KEY SELECTION BASED ON DEFINED SELECTION CRITERIA' [patent_app_type] => utility [patent_app_number] => 12/493424 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8776 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20100030955.pdf [firstpage_image] =>[orig_patent_app_number] => 12493424 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493424
Mask key selection based on defined selection criteria Jun 28, 2009 Issued
Array ( [id] => 5457131 [patent_doc_number] => 20090257283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'METHOD FOR DELETING DATA FROM NAND TYPE NONVOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/491395 [patent_app_country] => US [patent_app_date] => 2009-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 21461 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20090257283.pdf [firstpage_image] =>[orig_patent_app_number] => 12491395 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/491395
Method for deleting data from NAND type nonvolatile memory Jun 24, 2009 Issued
Array ( [id] => 4540982 [patent_doc_number] => 07872921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Non-volatile semiconductor memory with page erase' [patent_app_type] => utility [patent_app_number] => 12/474056 [patent_app_country] => US [patent_app_date] => 2009-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 53 [patent_no_of_words] => 14292 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872921.pdf [firstpage_image] =>[orig_patent_app_number] => 12474056 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/474056
Non-volatile semiconductor memory with page erase May 27, 2009 Issued
Array ( [id] => 6615986 [patent_doc_number] => 20100293333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'MULTIPLE CACHE DIRECTORIES' [patent_app_type] => utility [patent_app_number] => 12/464898 [patent_app_country] => US [patent_app_date] => 2009-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 18226 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20100293333.pdf [firstpage_image] =>[orig_patent_app_number] => 12464898 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/464898
Multiple cache directories May 12, 2009 Issued
Array ( [id] => 8120021 [patent_doc_number] => 08161233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Multi-stream restore system and method' [patent_app_type] => utility [patent_app_number] => 12/465018 [patent_app_country] => US [patent_app_date] => 2009-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3959 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161233.pdf [firstpage_image] =>[orig_patent_app_number] => 12465018 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/465018
Multi-stream restore system and method May 12, 2009 Issued
Array ( [id] => 6616021 [patent_doc_number] => 20100293335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'Cache Management' [patent_app_type] => utility [patent_app_number] => 12/464951 [patent_app_country] => US [patent_app_date] => 2009-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5195 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20100293335.pdf [firstpage_image] =>[orig_patent_app_number] => 12464951 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/464951
Managing cache elements May 12, 2009 Issued
Array ( [id] => 6615925 [patent_doc_number] => 20100293328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'MANAGING FIRST LEVEL STORAGE IN A MULTI-HOST ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 12/465430 [patent_app_country] => US [patent_app_date] => 2009-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4708 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20100293328.pdf [firstpage_image] =>[orig_patent_app_number] => 12465430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/465430
Managing first level storage in a multi-host environment May 12, 2009 Issued
Array ( [id] => 6616228 [patent_doc_number] => 20100293349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'CONVERTING LUNS INTO FILES OR FILES INTO LUNS IN REAL TIME' [patent_app_type] => utility [patent_app_number] => 12/464329 [patent_app_country] => US [patent_app_date] => 2009-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10251 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20100293349.pdf [firstpage_image] =>[orig_patent_app_number] => 12464329 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/464329
Converting luns into files or files into luns in real time May 11, 2009 Issued
Array ( [id] => 7679672 [patent_doc_number] => 20100106915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'POLL BASED CACHE EVENT NOTIFICATIONS IN A DISTRIBUTED CACHE' [patent_app_type] => utility [patent_app_number] => 12/463745 [patent_app_country] => US [patent_app_date] => 2009-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20100106915.pdf [firstpage_image] =>[orig_patent_app_number] => 12463745 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/463745
Poll based cache event notifications in a distributed cache May 10, 2009 Issued
Array ( [id] => 8087409 [patent_doc_number] => 08151037 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-03 [patent_title] => 'Interface for solid-state memory' [patent_app_type] => utility [patent_app_number] => 12/463687 [patent_app_country] => US [patent_app_date] => 2009-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/151/08151037.pdf [firstpage_image] =>[orig_patent_app_number] => 12463687 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/463687
Interface for solid-state memory May 10, 2009 Issued
Array ( [id] => 8170507 [patent_doc_number] => 08176232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Dedicated interface to factory program phase-change memories' [patent_app_type] => utility [patent_app_number] => 12/464036 [patent_app_country] => US [patent_app_date] => 2009-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/176/08176232.pdf [firstpage_image] =>[orig_patent_app_number] => 12464036 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/464036
Dedicated interface to factory program phase-change memories May 10, 2009 Issued
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