Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5445301 [patent_doc_number] => 20090046527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'AUTO PRECHARGE CIRCUIT SHARING A WRITE AUTO PRECHARGE SIGNAL GENERATING UNIT' [patent_app_type] => utility [patent_app_number] => 12/137040 [patent_app_country] => US [patent_app_date] => 2008-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3730 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20090046527.pdf [firstpage_image] =>[orig_patent_app_number] => 12137040 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137040
Auto precharge circuit sharing a write auto precharge signal generating unit Jun 10, 2008 Issued
Array ( [id] => 6613 [patent_doc_number] => 07817479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Nonvolatile memory device using a variable resistive element and associated operating method' [patent_app_type] => utility [patent_app_number] => 12/136822 [patent_app_country] => US [patent_app_date] => 2008-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 3996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/817/07817479.pdf [firstpage_image] =>[orig_patent_app_number] => 12136822 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/136822
Nonvolatile memory device using a variable resistive element and associated operating method Jun 10, 2008 Issued
Array ( [id] => 4792225 [patent_doc_number] => 20080293199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'SINGLE-POLY NON-VOLATILE MEMORY DEVICE AND ITS OPERATION METHOD' [patent_app_type] => utility [patent_app_number] => 12/125912 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6185 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293199.pdf [firstpage_image] =>[orig_patent_app_number] => 12125912 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125912
Single-poly non-volatile memory device and its operation method May 21, 2008 Issued
Array ( [id] => 170843 [patent_doc_number] => 07668007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Memory system including a resistance variable memory device' [patent_app_type] => utility [patent_app_number] => 12/124523 [patent_app_country] => US [patent_app_date] => 2008-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7638 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/668/07668007.pdf [firstpage_image] =>[orig_patent_app_number] => 12124523 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/124523
Memory system including a resistance variable memory device May 20, 2008 Issued
Array ( [id] => 286555 [patent_doc_number] => 07551485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/106892 [patent_app_country] => US [patent_app_date] => 2008-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 6456 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/551/07551485.pdf [firstpage_image] =>[orig_patent_app_number] => 12106892 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/106892
Semiconductor memory device Apr 20, 2008 Issued
Array ( [id] => 76636 [patent_doc_number] => 07751264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-06 [patent_title] => 'Memory repair system and method' [patent_app_type] => utility [patent_app_number] => 12/082760 [patent_app_country] => US [patent_app_date] => 2008-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 9075 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/751/07751264.pdf [firstpage_image] =>[orig_patent_app_number] => 12082760 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/082760
Memory repair system and method Apr 13, 2008 Issued
Array ( [id] => 8341553 [patent_doc_number] => 08243484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Adjustable width strobe interface' [patent_app_type] => utility [patent_app_number] => 12/532914 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5827 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12532914 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/532914
Adjustable width strobe interface Mar 26, 2008 Issued
Array ( [id] => 364843 [patent_doc_number] => 07483304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-27 [patent_title] => 'Semiconductor memory device capable of setting a negative threshold voltage' [patent_app_type] => utility [patent_app_number] => 12/055074 [patent_app_country] => US [patent_app_date] => 2008-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 10311 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/483/07483304.pdf [firstpage_image] =>[orig_patent_app_number] => 12055074 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/055074
Semiconductor memory device capable of setting a negative threshold voltage Mar 24, 2008 Issued
Array ( [id] => 4725646 [patent_doc_number] => 20080205187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'DATA FLOW CONTROL IN MULTIPLE INDEPENDENT PORT' [patent_app_type] => utility [patent_app_number] => 12/034686 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16230 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20080205187.pdf [firstpage_image] =>[orig_patent_app_number] => 12034686 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034686
Data flow control in multiple independent port Feb 20, 2008 Issued
Array ( [id] => 4730330 [patent_doc_number] => 20080209111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'OVER-SAMPLING READ OPERATION FOR A FLASH MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/034872 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4017 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20080209111.pdf [firstpage_image] =>[orig_patent_app_number] => 12034872 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034872
Over-sampling read operation for a flash memory device Feb 20, 2008 Issued
Array ( [id] => 578425 [patent_doc_number] => 07466595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Low-voltage reading device in particular for MRAM memory' [patent_app_type] => utility [patent_app_number] => 12/033795 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466595.pdf [firstpage_image] =>[orig_patent_app_number] => 12033795 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/033795
Low-voltage reading device in particular for MRAM memory Feb 18, 2008 Issued
Array ( [id] => 5478799 [patent_doc_number] => 20090201756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-13 [patent_title] => 'Method and Circuit for Implementing Enhanced Efuse Sense Circuit' [patent_app_type] => utility [patent_app_number] => 12/029010 [patent_app_country] => US [patent_app_date] => 2008-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20090201756.pdf [firstpage_image] =>[orig_patent_app_number] => 12029010 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/029010
Method and circuit for implementing enhanced eFuse sense circuit Feb 10, 2008 Issued
Array ( [id] => 4871944 [patent_doc_number] => 20080198678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'PROGRAMMABLE SRAM SOURCE BIAS SCHEME FOR USE WITH SWITCHABLE SRAM POWER SUPPLY SETS OF VOLTAGES' [patent_app_type] => utility [patent_app_number] => 12/029366 [patent_app_country] => US [patent_app_date] => 2008-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10451 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20080198678.pdf [firstpage_image] =>[orig_patent_app_number] => 12029366 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/029366
Programmable SRAM source bias scheme for use with switchable SRAM power supply sets of voltages Feb 10, 2008 Issued
Array ( [id] => 4725634 [patent_doc_number] => 20080205175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Auto-precharge control circuit in semiconductor memory and method thereof' [patent_app_type] => utility [patent_app_number] => 12/068280 [patent_app_country] => US [patent_app_date] => 2008-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5519 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20080205175.pdf [firstpage_image] =>[orig_patent_app_number] => 12068280 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/068280
Auto-precharge control circuit in semiconductor memory and method thereof Feb 4, 2008 Abandoned
Array ( [id] => 170870 [patent_doc_number] => 07668034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Power voltage supplier of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/068273 [patent_app_country] => US [patent_app_date] => 2008-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3374 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/668/07668034.pdf [firstpage_image] =>[orig_patent_app_number] => 12068273 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/068273
Power voltage supplier of semiconductor memory device Feb 4, 2008 Issued
Array ( [id] => 4625576 [patent_doc_number] => 08004882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Spintronic devices with integrated transistors' [patent_app_type] => utility [patent_app_number] => 12/017308 [patent_app_country] => US [patent_app_date] => 2008-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 7459 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/004/08004882.pdf [firstpage_image] =>[orig_patent_app_number] => 12017308 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017308
Spintronic devices with integrated transistors Jan 20, 2008 Issued
Array ( [id] => 4750894 [patent_doc_number] => 20080158965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'OPERATING METHOD OF NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/014096 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5646 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158965.pdf [firstpage_image] =>[orig_patent_app_number] => 12014096 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014096
OPERATING METHOD OF NON-VOLATILE MEMORY Jan 14, 2008 Abandoned
Array ( [id] => 4544495 [patent_doc_number] => 07889571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Buffering systems methods for accessing multiple layers of memory in integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/008212 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6973 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/889/07889571.pdf [firstpage_image] =>[orig_patent_app_number] => 12008212 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/008212
Buffering systems methods for accessing multiple layers of memory in integrated circuits Jan 8, 2008 Issued
Array ( [id] => 144161 [patent_doc_number] => 07688623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Magnetic memory cell and magnetic memory device' [patent_app_type] => utility [patent_app_number] => 11/970550 [patent_app_country] => US [patent_app_date] => 2008-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5243 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688623.pdf [firstpage_image] =>[orig_patent_app_number] => 11970550 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/970550
Magnetic memory cell and magnetic memory device Jan 7, 2008 Issued
Array ( [id] => 4491766 [patent_doc_number] => 07903458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Method and apparatus for reduction of bit-line disturb and soft-erase in a trapped-charge memory' [patent_app_type] => utility [patent_app_number] => 11/966631 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6264 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/903/07903458.pdf [firstpage_image] =>[orig_patent_app_number] => 11966631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/966631
Method and apparatus for reduction of bit-line disturb and soft-erase in a trapped-charge memory Dec 27, 2007 Issued
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