Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5044798 [patent_doc_number] => 20070263470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Techniques for reducing leakage current in memory devices' [patent_app_type] => utility [patent_app_number] => 11/879396 [patent_app_country] => US [patent_app_date] => 2007-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4243 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20070263470.pdf [firstpage_image] =>[orig_patent_app_number] => 11879396 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/879396
Techniques for reducing leakage current in memory devices Jul 16, 2007 Issued
Array ( [id] => 349866 [patent_doc_number] => 07495990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Semiconductor memory device and method of controlling the semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/806721 [patent_app_country] => US [patent_app_date] => 2007-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9191 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/495/07495990.pdf [firstpage_image] =>[orig_patent_app_number] => 11806721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/806721
Semiconductor memory device and method of controlling the semiconductor memory device Jun 3, 2007 Issued
Array ( [id] => 35023 [patent_doc_number] => 07791956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Method and system for simultaneous reads of multiple arrays' [patent_app_type] => utility [patent_app_number] => 11/752938 [patent_app_country] => US [patent_app_date] => 2007-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4512 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/791/07791956.pdf [firstpage_image] =>[orig_patent_app_number] => 11752938 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/752938
Method and system for simultaneous reads of multiple arrays May 23, 2007 Issued
Array ( [id] => 5584156 [patent_doc_number] => 20090103358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'REDUCING PROGRAMMING ERROR IN MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 11/995806 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8291 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20090103358.pdf [firstpage_image] =>[orig_patent_app_number] => 11995806 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/995806
Reducing programming error in memory devices May 9, 2007 Issued
Array ( [id] => 5130035 [patent_doc_number] => 20070206432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Microcomputer and microprocessor having flash memory operable from single external power supply' [patent_app_type] => utility [patent_app_number] => 11/797579 [patent_app_country] => US [patent_app_date] => 2007-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14559 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20070206432.pdf [firstpage_image] =>[orig_patent_app_number] => 11797579 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/797579
Microcomputer and microprocessor having flash memory operable from single external power supply May 3, 2007 Issued
Array ( [id] => 5003707 [patent_doc_number] => 20070201274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Cell-Downgrading and Reference-Voltage Adjustment for a Multi-Bit-Cell Flash Memory' [patent_app_type] => utility [patent_app_number] => 11/737336 [patent_app_country] => US [patent_app_date] => 2007-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20070201274.pdf [firstpage_image] =>[orig_patent_app_number] => 11737336 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/737336
Cell-downgrading and reference-voltage adjustment for a multi-bit-cell flash memory Apr 18, 2007 Issued
Array ( [id] => 5164391 [patent_doc_number] => 20070285975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/736252 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 8659 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285975.pdf [firstpage_image] =>[orig_patent_app_number] => 11736252 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736252
Semiconductor device Apr 16, 2007 Issued
Array ( [id] => 5164390 [patent_doc_number] => 20070285974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/736088 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285974.pdf [firstpage_image] =>[orig_patent_app_number] => 11736088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736088
Semiconductor device Apr 16, 2007 Issued
Array ( [id] => 312078 [patent_doc_number] => 07529113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Magnetic storage device' [patent_app_type] => utility [patent_app_number] => 11/736300 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 8425 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/529/07529113.pdf [firstpage_image] =>[orig_patent_app_number] => 11736300 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736300
Magnetic storage device Apr 16, 2007 Issued
Array ( [id] => 4662282 [patent_doc_number] => 20080253189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'MEMORY UNIT' [patent_app_type] => utility [patent_app_number] => 11/735910 [patent_app_country] => US [patent_app_date] => 2007-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5391 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253189.pdf [firstpage_image] =>[orig_patent_app_number] => 11735910 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735910
Memory unit Apr 15, 2007 Issued
Array ( [id] => 204610 [patent_doc_number] => 07633814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Memory device and method of operating such' [patent_app_type] => utility [patent_app_number] => 11/735928 [patent_app_country] => US [patent_app_date] => 2007-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5218 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/633/07633814.pdf [firstpage_image] =>[orig_patent_app_number] => 11735928 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735928
Memory device and method of operating such Apr 15, 2007 Issued
Array ( [id] => 5111687 [patent_doc_number] => 20070195602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'REDUCING FLOATING GATE TO FLOATING GATE COUPLING EFFECT' [patent_app_type] => utility [patent_app_number] => 11/735265 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8959 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20070195602.pdf [firstpage_image] =>[orig_patent_app_number] => 11735265 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735265
Reducing floating gate to floating gate coupling effect Apr 12, 2007 Issued
Array ( [id] => 187111 [patent_doc_number] => 07646645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Method and apparatus for testing the functionality of a page decoder' [patent_app_type] => utility [patent_app_number] => 11/735182 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3076 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/646/07646645.pdf [firstpage_image] =>[orig_patent_app_number] => 11735182 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735182
Method and apparatus for testing the functionality of a page decoder Apr 12, 2007 Issued
Array ( [id] => 5246286 [patent_doc_number] => 20070242520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'VOLTAGE REGULATOR HAVING A LOW NOISE DISCHARGE SWITCH FOR NON-VOLATILE MEMORIES, IN PARTICULAR FOR DISCHARGING WORD LINES FROM NEGATIVE VOLTAGES' [patent_app_type] => utility [patent_app_number] => 11/734974 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3244 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20070242520.pdf [firstpage_image] =>[orig_patent_app_number] => 11734974 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734974
Voltage regulator having a low noise discharge switch for non-volatile memories, in particular for discharging word lines from negative voltages Apr 12, 2007 Issued
Array ( [id] => 5246309 [patent_doc_number] => 20070242543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'DRAM BITLINE PRECHARGE SCHEME' [patent_app_type] => utility [patent_app_number] => 11/734588 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7346 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20070242543.pdf [firstpage_image] =>[orig_patent_app_number] => 11734588 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734588
DRAM bitline precharge scheme Apr 11, 2007 Issued
Array ( [id] => 346130 [patent_doc_number] => 07499322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-03 [patent_title] => 'Integrated circuit memory system with high speed non-volatile memory data transfer capability' [patent_app_type] => utility [patent_app_number] => 11/734082 [patent_app_country] => US [patent_app_date] => 2007-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4973 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/499/07499322.pdf [firstpage_image] =>[orig_patent_app_number] => 11734082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734082
Integrated circuit memory system with high speed non-volatile memory data transfer capability Apr 10, 2007 Issued
Array ( [id] => 339010 [patent_doc_number] => 07505355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Semiconductor memory device with MOS transistors each having floating gate and control gate' [patent_app_type] => utility [patent_app_number] => 11/733796 [patent_app_country] => US [patent_app_date] => 2007-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 27976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/505/07505355.pdf [firstpage_image] =>[orig_patent_app_number] => 11733796 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733796
Semiconductor memory device with MOS transistors each having floating gate and control gate Apr 10, 2007 Issued
Array ( [id] => 4662286 [patent_doc_number] => 20080253193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Non-Volatile Memory with Predictive Programming' [patent_app_type] => utility [patent_app_number] => 11/733706 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7745 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253193.pdf [firstpage_image] =>[orig_patent_app_number] => 11733706 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733706
Non-volatile memory with predictive programming Apr 9, 2007 Issued
Array ( [id] => 4662290 [patent_doc_number] => 20080253197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Predictive Programming in Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 11/733694 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7747 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253197.pdf [firstpage_image] =>[orig_patent_app_number] => 11733694 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733694
Predictive programming in non-volatile memory Apr 9, 2007 Issued
Array ( [id] => 7600862 [patent_doc_number] => 07385847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/697939 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5472 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/385/07385847.pdf [firstpage_image] =>[orig_patent_app_number] => 11697939 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697939
Semiconductor device Apr 8, 2007 Issued
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