Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 944800 [patent_doc_number] => 06967856 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Content addressable memory (CAM) devices that utilize segmented match lines and word lines to support pipelined search and write operations and methods of operating same' [patent_app_type] => utility [patent_app_number] => 10/701048 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 18723 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967856.pdf [firstpage_image] =>[orig_patent_app_number] => 10701048 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701048
Content addressable memory (CAM) devices that utilize segmented match lines and word lines to support pipelined search and write operations and methods of operating same Nov 3, 2003 Issued
Array ( [id] => 7102623 [patent_doc_number] => 20050105349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Programmable data strobe offset with DLL for double data rate (DDR) RAM memory' [patent_app_type] => utility [patent_app_number] => 10/699932 [patent_app_country] => US [patent_app_date] => 2003-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2655 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20050105349.pdf [firstpage_image] =>[orig_patent_app_number] => 10699932 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/699932
Programmable data strobe offset with DLL for double data rate (DDR) RAM memory Nov 3, 2003 Issued
Array ( [id] => 7358409 [patent_doc_number] => 20040090849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Semiconductor storage device having page copying function' [patent_app_type] => new [patent_app_number] => 10/699398 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4824 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20040090849.pdf [firstpage_image] =>[orig_patent_app_number] => 10699398 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/699398
Semiconductor storage device having page copying function Oct 30, 2003 Issued
Array ( [id] => 7102592 [patent_doc_number] => 20050105318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Memory module, memory chip, and memory system' [patent_app_type] => utility [patent_app_number] => 10/699628 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7216 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20050105318.pdf [firstpage_image] =>[orig_patent_app_number] => 10699628 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/699628
Memory module, memory chip, and memory system Oct 30, 2003 Issued
Array ( [id] => 1029560 [patent_doc_number] => 06882592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/696028 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 45 [patent_no_of_words] => 34094 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/882/06882592.pdf [firstpage_image] =>[orig_patent_app_number] => 10696028 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/696028
Semiconductor memory device Oct 29, 2003 Issued
Array ( [id] => 973962 [patent_doc_number] => 06937523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Neighbor effect cancellation in memory array architecture' [patent_app_type] => utility [patent_app_number] => 10/696728 [patent_app_country] => US [patent_app_date] => 2003-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 8416 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937523.pdf [firstpage_image] =>[orig_patent_app_number] => 10696728 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/696728
Neighbor effect cancellation in memory array architecture Oct 26, 2003 Issued
Array ( [id] => 7150685 [patent_doc_number] => 20050024942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING A BURST CONTINUOUS READ FUNCTION' [patent_app_type] => utility [patent_app_number] => 10/692329 [patent_app_country] => US [patent_app_date] => 2003-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20050024942.pdf [firstpage_image] =>[orig_patent_app_number] => 10692329 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/692329
Semiconductor memory device having a burst continuous read function Oct 21, 2003 Issued
Array ( [id] => 475484 [patent_doc_number] => 07230839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-12 [patent_title] => 'Magnitude content addressable memory' [patent_app_type] => utility [patent_app_number] => 10/690368 [patent_app_country] => US [patent_app_date] => 2003-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3972 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/230/07230839.pdf [firstpage_image] =>[orig_patent_app_number] => 10690368 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690368
Magnitude content addressable memory Oct 20, 2003 Issued
Array ( [id] => 7225717 [patent_doc_number] => 20050078509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'System and method for reading data stored on a magnetic shift register' [patent_app_type] => utility [patent_app_number] => 10/685828 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11280 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20050078509.pdf [firstpage_image] =>[orig_patent_app_number] => 10685828 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/685828
System and method for reading data stored on a magnetic shift register Oct 13, 2003 Issued
Array ( [id] => 942220 [patent_doc_number] => 06970379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'System and method for storing data in an unpatterned, continuous magnetic layer' [patent_app_type] => utility [patent_app_number] => 10/685835 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 14482 [patent_no_of_claims] => 119 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970379.pdf [firstpage_image] =>[orig_patent_app_number] => 10685835 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/685835
System and method for storing data in an unpatterned, continuous magnetic layer Oct 13, 2003 Issued
Array ( [id] => 7225820 [patent_doc_number] => 20050078530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Method and circuit configuration for digitizing a signal in an input buffer of a DRAM device' [patent_app_type] => utility [patent_app_number] => 10/683768 [patent_app_country] => US [patent_app_date] => 2003-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3422 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20050078530.pdf [firstpage_image] =>[orig_patent_app_number] => 10683768 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/683768
Method and circuit configuration for digitizing a signal in an input buffer of a DRAM device Oct 9, 2003 Issued
Array ( [id] => 7225823 [patent_doc_number] => 20050078531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Reference current distribution in MRAM devices' [patent_app_type] => utility [patent_app_number] => 10/683965 [patent_app_country] => US [patent_app_date] => 2003-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4761 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20050078531.pdf [firstpage_image] =>[orig_patent_app_number] => 10683965 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/683965
Reference current distribution in MRAM devices Oct 9, 2003 Issued
Array ( [id] => 793855 [patent_doc_number] => 06982902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-03 [patent_title] => 'MRAM array having a segmented bit line' [patent_app_type] => utility [patent_app_number] => 10/679160 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5230 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/982/06982902.pdf [firstpage_image] =>[orig_patent_app_number] => 10679160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679160
MRAM array having a segmented bit line Oct 2, 2003 Issued
Array ( [id] => 1000756 [patent_doc_number] => 06912159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Boosting circuit and non-volatile semiconductor storage device containing the same' [patent_app_type] => utility [patent_app_number] => 10/678932 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8365 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912159.pdf [firstpage_image] =>[orig_patent_app_number] => 10678932 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678932
Boosting circuit and non-volatile semiconductor storage device containing the same Oct 2, 2003 Issued
Array ( [id] => 7614431 [patent_doc_number] => 06898099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'Content addressable memory having dynamic match resolution' [patent_app_type] => utility [patent_app_number] => 10/679073 [patent_app_country] => US [patent_app_date] => 2003-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 12614 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898099.pdf [firstpage_image] =>[orig_patent_app_number] => 10679073 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679073
Content addressable memory having dynamic match resolution Oct 1, 2003 Issued
Array ( [id] => 5709217 [patent_doc_number] => 20060050562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'NON-VOLATILE MEMORY AND METHOD WITH IMPROVED SENSING' [patent_app_type] => utility [patent_app_number] => 10/678918 [patent_app_country] => US [patent_app_date] => 2003-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 17200 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20060050562.pdf [firstpage_image] =>[orig_patent_app_number] => 10678918 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678918
Non-volatile memory and method with improved sensing Oct 1, 2003 Issued
Array ( [id] => 1038959 [patent_doc_number] => 06873554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/675829 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6788 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/873/06873554.pdf [firstpage_image] =>[orig_patent_app_number] => 10675829 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675829
Semiconductor memory device Sep 30, 2003 Issued
Array ( [id] => 7196282 [patent_doc_number] => 20050041500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Dynamic random access memory devices and method of controlling refresh operation thereof' [patent_app_type] => utility [patent_app_number] => 10/676232 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 971 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20050041500.pdf [firstpage_image] =>[orig_patent_app_number] => 10676232 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676232
Dynamic random access memory devices and method of controlling refresh operation thereof Sep 30, 2003 Issued
Array ( [id] => 714024 [patent_doc_number] => 07057958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Method and system for temperature compensation for memory cells with temperature-dependent behavior' [patent_app_type] => utility [patent_app_number] => 10/676862 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5434 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057958.pdf [firstpage_image] =>[orig_patent_app_number] => 10676862 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676862
Method and system for temperature compensation for memory cells with temperature-dependent behavior Sep 29, 2003 Issued
Array ( [id] => 7441038 [patent_doc_number] => 20040066691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Systems and methods for communicating with memory blocks' [patent_app_type] => new [patent_app_number] => 10/675191 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5836 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20040066691.pdf [firstpage_image] =>[orig_patent_app_number] => 10675191 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675191
Systems and methods for communicating with memory blocks Sep 29, 2003 Issued
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