Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1003738 [patent_doc_number] => 06909657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Pseudostatic memory circuit' [patent_app_type] => utility [patent_app_number] => 10/675433 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5120 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909657.pdf [firstpage_image] =>[orig_patent_app_number] => 10675433 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675433
Pseudostatic memory circuit Sep 29, 2003 Issued
Array ( [id] => 994843 [patent_doc_number] => 06917552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Semiconductor device using high-speed sense amplifier' [patent_app_type] => utility [patent_app_number] => 10/671464 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 9026 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/917/06917552.pdf [firstpage_image] =>[orig_patent_app_number] => 10671464 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671464
Semiconductor device using high-speed sense amplifier Sep 28, 2003 Issued
Array ( [id] => 994807 [patent_doc_number] => 06917535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Column select circuit of ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 10/671468 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5471 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/917/06917535.pdf [firstpage_image] =>[orig_patent_app_number] => 10671468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671468
Column select circuit of ferroelectric memory Sep 28, 2003 Issued
Array ( [id] => 1042104 [patent_doc_number] => 06870756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 10/670532 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5189 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870756.pdf [firstpage_image] =>[orig_patent_app_number] => 10670532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670532
Semiconductor integrated circuit device Sep 25, 2003 Issued
Array ( [id] => 7268175 [patent_doc_number] => 20040056693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Integrated circuit having an input circuit' [patent_app_type] => new [patent_app_number] => 10/670662 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2712 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056693.pdf [firstpage_image] =>[orig_patent_app_number] => 10670662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670662
Integrated circuit having an input circuit Sep 24, 2003 Issued
Array ( [id] => 7293522 [patent_doc_number] => 20040213069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Sram control circuit with a power saving function' [patent_app_type] => new [patent_app_number] => 10/669530 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1558 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20040213069.pdf [firstpage_image] =>[orig_patent_app_number] => 10669530 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/669530
SRAM control circuit with a power saving function Sep 24, 2003 Issued
Array ( [id] => 1045387 [patent_doc_number] => 06868021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Rapidly testable semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/669532 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 12948 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/868/06868021.pdf [firstpage_image] =>[orig_patent_app_number] => 10669532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/669532
Rapidly testable semiconductor memory device Sep 24, 2003 Issued
Array ( [id] => 7287882 [patent_doc_number] => 20040109357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Non-volatile memory and method with improved sensing' [patent_app_type] => new [patent_app_number] => 10/665828 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 17433 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109357.pdf [firstpage_image] =>[orig_patent_app_number] => 10665828 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665828
Non-volatile memory and method with improved sensing Sep 16, 2003 Issued
Array ( [id] => 7611861 [patent_doc_number] => 06903978 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-07 [patent_title] => 'Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage' [patent_app_type] => utility [patent_app_number] => 10/664469 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 928 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903978.pdf [firstpage_image] =>[orig_patent_app_number] => 10664469 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/664469
Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage Sep 16, 2003 Issued
Array ( [id] => 1026591 [patent_doc_number] => 06885595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 10/660632 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 37 [patent_no_of_words] => 13581 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885595.pdf [firstpage_image] =>[orig_patent_app_number] => 10660632 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/660632
Memory device Sep 11, 2003 Issued
Array ( [id] => 874807 [patent_doc_number] => 07362609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Memory cell' [patent_app_type] => utility [patent_app_number] => 10/526382 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 7415 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/362/07362609.pdf [firstpage_image] =>[orig_patent_app_number] => 10526382 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/526382
Memory cell Sep 11, 2003 Issued
Array ( [id] => 7247233 [patent_doc_number] => 20050073869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Method for operating a ferroelectric of electret memory device, and a device of this kind' [patent_app_type] => utility [patent_app_number] => 10/659428 [patent_app_country] => US [patent_app_date] => 2003-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9711 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20050073869.pdf [firstpage_image] =>[orig_patent_app_number] => 10659428 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659428
Method for operating a ferroelectric of electret memory device, and a device of this kind Sep 10, 2003 Issued
Array ( [id] => 7459482 [patent_doc_number] => 20040100833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Semiconductor memory enabling correct substitution of redundant cell array' [patent_app_type] => new [patent_app_number] => 10/658428 [patent_app_country] => US [patent_app_date] => 2003-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8187 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20040100833.pdf [firstpage_image] =>[orig_patent_app_number] => 10658428 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658428
Semiconductor memory enabling correct substitution of redundant cell array Sep 9, 2003 Issued
Array ( [id] => 7257049 [patent_doc_number] => 20040240247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Memory with shielding effect' [patent_app_type] => new [patent_app_number] => 10/658324 [patent_app_country] => US [patent_app_date] => 2003-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2214 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20040240247.pdf [firstpage_image] =>[orig_patent_app_number] => 10658324 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658324
Memory with shielding effect Sep 9, 2003 Issued
Array ( [id] => 7204506 [patent_doc_number] => 20050052934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Unified multilevel cell memory' [patent_app_type] => utility [patent_app_number] => 10/659226 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9829 [patent_no_of_claims] => 85 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20050052934.pdf [firstpage_image] =>[orig_patent_app_number] => 10659226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659226
Unified multilevel cell memory Sep 8, 2003 Issued
Array ( [id] => 1057953 [patent_doc_number] => 06856561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/657790 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 17686 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856561.pdf [firstpage_image] =>[orig_patent_app_number] => 10657790 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/657790
Semiconductor memory device Sep 7, 2003 Issued
Array ( [id] => 7204564 [patent_doc_number] => 20050052943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Memory device and method of reading data from a memory device' [patent_app_type] => utility [patent_app_number] => 10/658130 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2884 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20050052943.pdf [firstpage_image] =>[orig_patent_app_number] => 10658130 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658130
Memory device and method of reading data from a memory device Sep 7, 2003 Issued
Array ( [id] => 7376671 [patent_doc_number] => 20040080995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Compressed event counting technique and application to a flash memory system' [patent_app_type] => new [patent_app_number] => 10/656658 [patent_app_country] => US [patent_app_date] => 2003-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10424 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080995.pdf [firstpage_image] =>[orig_patent_app_number] => 10656658 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/656658
Compressed event counting technique and application to a flash memory system Sep 3, 2003 Abandoned
Array ( [id] => 557167 [patent_doc_number] => 07170798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'Controlled substrate voltage for memory switches' [patent_app_type] => utility [patent_app_number] => 10/652266 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1141 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/170/07170798.pdf [firstpage_image] =>[orig_patent_app_number] => 10652266 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652266
Controlled substrate voltage for memory switches Aug 28, 2003 Issued
Array ( [id] => 973940 [patent_doc_number] => 06937515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/652229 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 8084 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937515.pdf [firstpage_image] =>[orig_patent_app_number] => 10652229 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652229
Semiconductor memory device Aug 28, 2003 Issued
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