Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7434003 [patent_doc_number] => 20040008564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Memory device for activating one cell by specifying block and memory cell in the block' [patent_app_type] => new [patent_app_number] => 10/347434 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5609 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008564.pdf [firstpage_image] =>[orig_patent_app_number] => 10347434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/347434
Memory device for activating one cell by specifying block and memory cell in the block Jan 20, 2003 Issued
Array ( [id] => 7306320 [patent_doc_number] => 20040141360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'BITLINE REFERENCE VOLTAGE CIRCUIT' [patent_app_type] => new [patent_app_number] => 10/345736 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20040141360.pdf [firstpage_image] =>[orig_patent_app_number] => 10345736 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345736
Bitline reference voltage circuit Jan 15, 2003 Issued
Array ( [id] => 6667668 [patent_doc_number] => 20030112651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'System and method for inhibiting imprinting of capacitor structures of a memory' [patent_app_type] => new [patent_app_number] => 10/346643 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4114 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20030112651.pdf [firstpage_image] =>[orig_patent_app_number] => 10346643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/346643
System and method for inhibiting imprinting of capacitor structures of a memory Jan 15, 2003 Issued
Array ( [id] => 7628776 [patent_doc_number] => 06819583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-16 [patent_title] => 'Ferroelectric resistor non-volatile memory array' [patent_app_type] => B2 [patent_app_number] => 10/345726 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2233 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819583.pdf [firstpage_image] =>[orig_patent_app_number] => 10345726 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345726
Ferroelectric resistor non-volatile memory array Jan 14, 2003 Issued
Array ( [id] => 6786632 [patent_doc_number] => 20030137871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Three terminal magnetic random access memory' [patent_app_type] => new [patent_app_number] => 10/341655 [patent_app_country] => US [patent_app_date] => 2003-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9015 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20030137871.pdf [firstpage_image] =>[orig_patent_app_number] => 10341655 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/341655
Three terminal magnetic random access memory Jan 13, 2003 Issued
Array ( [id] => 7627342 [patent_doc_number] => 06807099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/345030 [patent_app_country] => US [patent_app_date] => 2003-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 6499 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/807/06807099.pdf [firstpage_image] =>[orig_patent_app_number] => 10345030 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345030
Semiconductor memory device Jan 13, 2003 Issued
Array ( [id] => 1045349 [patent_doc_number] => 06867992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Modular memory device' [patent_app_type] => utility [patent_app_number] => 10/342122 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867992.pdf [firstpage_image] =>[orig_patent_app_number] => 10342122 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/342122
Modular memory device Jan 12, 2003 Issued
Array ( [id] => 6657368 [patent_doc_number] => 20030133340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'NAND flash memory and method of erasing, programming, and copy-back programming thereof' [patent_app_type] => new [patent_app_number] => 10/340532 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8901 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20030133340.pdf [firstpage_image] =>[orig_patent_app_number] => 10340532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/340532
NAND flash memory and method of erasing, programming, and copy-back programming thereof Jan 9, 2003 Issued
Array ( [id] => 6855119 [patent_doc_number] => 20030128620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Buffer using two-port memory' [patent_app_type] => new [patent_app_number] => 10/338830 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6895 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128620.pdf [firstpage_image] =>[orig_patent_app_number] => 10338830 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/338830
Buffer using two-port memory Jan 8, 2003 Issued
Array ( [id] => 6704336 [patent_doc_number] => 20030151070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Booster circuit for non-volatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/338834 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8759 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151070.pdf [firstpage_image] =>[orig_patent_app_number] => 10338834 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/338834
Booster circuit for non-volatile semiconductor memory device Jan 8, 2003 Issued
Array ( [id] => 7628754 [patent_doc_number] => 06819606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-16 [patent_title] => 'Method for storing data in a memory device with the possibility of access to redundant memory cells' [patent_app_type] => B2 [patent_app_number] => 10/339031 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2114 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819606.pdf [firstpage_image] =>[orig_patent_app_number] => 10339031 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/339031
Method for storing data in a memory device with the possibility of access to redundant memory cells Jan 8, 2003 Issued
Array ( [id] => 1183302 [patent_doc_number] => 06744691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor memory module' [patent_app_type] => B2 [patent_app_number] => 10/337734 [patent_app_country] => US [patent_app_date] => 2003-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 8367 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744691.pdf [firstpage_image] =>[orig_patent_app_number] => 10337734 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/337734
Semiconductor memory module Jan 7, 2003 Issued
Array ( [id] => 1180201 [patent_doc_number] => 06751126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Clamping circuit and nonvolatile memory device using the same' [patent_app_type] => B2 [patent_app_number] => 10/326632 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7439 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751126.pdf [firstpage_image] =>[orig_patent_app_number] => 10326632 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/326632
Clamping circuit and nonvolatile memory device using the same Dec 22, 2002 Issued
Array ( [id] => 7434002 [patent_doc_number] => 20040008563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Semiconductor memory device with reduced power consumption' [patent_app_type] => new [patent_app_number] => 10/325827 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8851 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008563.pdf [firstpage_image] =>[orig_patent_app_number] => 10325827 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325827
Semiconductor memory device with reduced power consumption Dec 22, 2002 Issued
Array ( [id] => 6790975 [patent_doc_number] => 20030086319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/323746 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10264 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20030086319.pdf [firstpage_image] =>[orig_patent_app_number] => 10323746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/323746
Semiconductor device Dec 19, 2002 Issued
Array ( [id] => 1172619 [patent_doc_number] => 06760242 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-06 [patent_title] => 'Content addressable memory (CAM) devices having speed adjustable match line signal repeaters therein' [patent_app_type] => B1 [patent_app_number] => 10/323236 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 22919 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/760/06760242.pdf [firstpage_image] =>[orig_patent_app_number] => 10323236 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/323236
Content addressable memory (CAM) devices having speed adjustable match line signal repeaters therein Dec 17, 2002 Issued
Array ( [id] => 749373 [patent_doc_number] => 07027327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Non-volatile memory' [patent_app_type] => utility [patent_app_number] => 10/486628 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 47 [patent_no_of_words] => 16251 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/027/07027327.pdf [firstpage_image] =>[orig_patent_app_number] => 10486628 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/486628
Non-volatile memory Dec 15, 2002 Issued
Array ( [id] => 1208708 [patent_doc_number] => 06717873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Balanced sense amplifier control for open digit line architecture memory devices' [patent_app_type] => B2 [patent_app_number] => 10/317106 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4027 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717873.pdf [firstpage_image] =>[orig_patent_app_number] => 10317106 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317106
Balanced sense amplifier control for open digit line architecture memory devices Dec 11, 2002 Issued
Array ( [id] => 1191132 [patent_doc_number] => 06735124 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-11 [patent_title] => 'Flash memory device having four-bit cells' [patent_app_type] => B1 [patent_app_number] => 10/315632 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5276 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/735/06735124.pdf [firstpage_image] =>[orig_patent_app_number] => 10315632 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/315632
Flash memory device having four-bit cells Dec 9, 2002 Issued
Array ( [id] => 6705216 [patent_doc_number] => 20030151950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/315034 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 19569 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151950.pdf [firstpage_image] =>[orig_patent_app_number] => 10315034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/315034
Non-volatile semiconductor memory device Dec 9, 2002 Issued
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