Search

David Lam

Examiner (ID: 14034, Phone: (571)272-1782 , Office: P/2825 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827, 2818
Total Applications
2102
Issued Applications
2016
Pending Applications
28
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4126637 [patent_doc_number] => 06046927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Nonvolatile semiconductor memory device, a method of fabricating the same, and read, erase write methods of the same' [patent_app_type] => 1 [patent_app_number] => 9/177569 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5200 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046927.pdf [firstpage_image] =>[orig_patent_app_number] => 177569 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177569
Nonvolatile semiconductor memory device, a method of fabricating the same, and read, erase write methods of the same Oct 22, 1998 Issued
Array ( [id] => 4231456 [patent_doc_number] => 06088272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Data output system' [patent_app_type] => 1 [patent_app_number] => 9/177078 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 12557 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088272.pdf [firstpage_image] =>[orig_patent_app_number] => 177078 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177078
Data output system Oct 22, 1998 Issued
Array ( [id] => 4216981 [patent_doc_number] => 06078535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Redundancy arrangement for novel memory architecture' [patent_app_type] => 1 [patent_app_number] => 9/178269 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 6942 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078535.pdf [firstpage_image] =>[orig_patent_app_number] => 178269 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/178269
Redundancy arrangement for novel memory architecture Oct 22, 1998 Issued
Array ( [id] => 4093598 [patent_doc_number] => 06055199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Test circuit for a semiconductor memory device and method for burn-in test' [patent_app_type] => 1 [patent_app_number] => 9/176880 [patent_app_country] => US [patent_app_date] => 1998-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 5531 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055199.pdf [firstpage_image] =>[orig_patent_app_number] => 176880 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176880
Test circuit for a semiconductor memory device and method for burn-in test Oct 20, 1998 Issued
Array ( [id] => 4155241 [patent_doc_number] => 06031769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Data reading circuit for semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/174579 [patent_app_country] => US [patent_app_date] => 1998-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 37 [patent_no_of_words] => 3102 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031769.pdf [firstpage_image] =>[orig_patent_app_number] => 174579 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/174579
Data reading circuit for semiconductor memory device Oct 18, 1998 Issued
Array ( [id] => 3925332 [patent_doc_number] => 06002628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Dynamic random access memory device with reduced refresh duration, and corresponding refresh process' [patent_app_type] => 1 [patent_app_number] => 9/170816 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4070 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002628.pdf [firstpage_image] =>[orig_patent_app_number] => 170816 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170816
Dynamic random access memory device with reduced refresh duration, and corresponding refresh process Oct 12, 1998 Issued
Array ( [id] => 4047706 [patent_doc_number] => 05995407 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Self-referencing ferroelectric memory' [patent_app_type] => 1 [patent_app_number] => 9/170418 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8976 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995407.pdf [firstpage_image] =>[orig_patent_app_number] => 170418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170418
Self-referencing ferroelectric memory Oct 12, 1998 Issued
Array ( [id] => 4233982 [patent_doc_number] => 06011722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Method for erasing and programming memory devices' [patent_app_type] => 1 [patent_app_number] => 9/170819 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 7386 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011722.pdf [firstpage_image] =>[orig_patent_app_number] => 170819 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170819
Method for erasing and programming memory devices Oct 12, 1998 Issued
Array ( [id] => 4246235 [patent_doc_number] => 06075744 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Dram core refresh with reduced spike current' [patent_app_type] => 1 [patent_app_number] => 9/169376 [patent_app_country] => US [patent_app_date] => 1998-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 4426 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075744.pdf [firstpage_image] =>[orig_patent_app_number] => 169376 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/169376
Dram core refresh with reduced spike current Oct 8, 1998 Issued
Array ( [id] => 4131564 [patent_doc_number] => 06072749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Memory device preventing a slow operation through a mask signal' [patent_app_type] => 1 [patent_app_number] => 9/166070 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7711 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072749.pdf [firstpage_image] =>[orig_patent_app_number] => 166070 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166070
Memory device preventing a slow operation through a mask signal Oct 4, 1998 Issued
Array ( [id] => 4246107 [patent_doc_number] => 06075735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Semiconductor memory device having reversing logic means' [patent_app_type] => 1 [patent_app_number] => 9/164368 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4070 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075735.pdf [firstpage_image] =>[orig_patent_app_number] => 164368 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164368
Semiconductor memory device having reversing logic means Sep 30, 1998 Issued
Array ( [id] => 4144648 [patent_doc_number] => 06016269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Quantum random address memory with magnetic readout and/or nano-memory elements' [patent_app_type] => 1 [patent_app_number] => 9/163880 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 8068 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016269.pdf [firstpage_image] =>[orig_patent_app_number] => 163880 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163880
Quantum random address memory with magnetic readout and/or nano-memory elements Sep 29, 1998 Issued
Array ( [id] => 4110147 [patent_doc_number] => 06097627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Quantum random address memory with nano-diode mixer' [patent_app_type] => 1 [patent_app_number] => 9/163878 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7657 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097627.pdf [firstpage_image] =>[orig_patent_app_number] => 163878 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163878
Quantum random address memory with nano-diode mixer Sep 29, 1998 Issued
Array ( [id] => 3960099 [patent_doc_number] => 05991190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Quantum random address memory with piezo readout' [patent_app_type] => 1 [patent_app_number] => 9/163879 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4436 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991190.pdf [firstpage_image] =>[orig_patent_app_number] => 163879 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163879
Quantum random address memory with piezo readout Sep 29, 1998 Issued
Array ( [id] => 4096625 [patent_doc_number] => 06026013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Quantum random address memory' [patent_app_type] => 1 [patent_app_number] => 9/163877 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6365 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026013.pdf [firstpage_image] =>[orig_patent_app_number] => 163877 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163877
Quantum random address memory Sep 29, 1998 Issued
Array ( [id] => 4193983 [patent_doc_number] => 06021075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Semiconductor memory circuit having shift redundancy circuits' [patent_app_type] => 1 [patent_app_number] => 9/161217 [patent_app_country] => US [patent_app_date] => 1998-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5379 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021075.pdf [firstpage_image] =>[orig_patent_app_number] => 161217 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161217
Semiconductor memory circuit having shift redundancy circuits Sep 27, 1998 Issued
Array ( [id] => 4234232 [patent_doc_number] => 06011738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Sensing circuit with charge recycling' [patent_app_type] => 1 [patent_app_number] => 9/161390 [patent_app_country] => US [patent_app_date] => 1998-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3238 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011738.pdf [firstpage_image] =>[orig_patent_app_number] => 161390 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161390
Sensing circuit with charge recycling Sep 27, 1998 Issued
Array ( [id] => 4012233 [patent_doc_number] => 05986948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Data communication for memory' [patent_app_type] => 1 [patent_app_number] => 9/159118 [patent_app_country] => US [patent_app_date] => 1998-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 7123 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986948.pdf [firstpage_image] =>[orig_patent_app_number] => 159118 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159118
Data communication for memory Sep 22, 1998 Issued
Array ( [id] => 3937011 [patent_doc_number] => 05946230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Nonvolatile semiconductor memory device having the reliability of gate insulating film of memory cells enhanced and method for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/156787 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 13856 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946230.pdf [firstpage_image] =>[orig_patent_app_number] => 156787 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156787
Nonvolatile semiconductor memory device having the reliability of gate insulating film of memory cells enhanced and method for manufacturing the same Sep 16, 1998 Issued
Array ( [id] => 3962259 [patent_doc_number] => 05956276 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Semiconductor memory having predecoder control of spare column select lines' [patent_app_type] => 1 [patent_app_number] => 9/153787 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1500 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956276.pdf [firstpage_image] =>[orig_patent_app_number] => 153787 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/153787
Semiconductor memory having predecoder control of spare column select lines Sep 15, 1998 Issued
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