
David M. Gray
Supervisory Patent Examiner (ID: 287, Phone: (571)272-2119 , Office: P/2852 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2851, 2853, 2602, 2101, 2852 |
| Total Applications | 2033 |
| Issued Applications | 1687 |
| Pending Applications | 28 |
| Abandoned Applications | 318 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17708984
[patent_doc_number] => 20220208992
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/136955
[patent_app_country] => US
[patent_app_date] => 2020-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136955
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/136955 | Semiconductor device and method of forming the same | Dec 28, 2020 | Issued |
Array
(
[id] => 17417261
[patent_doc_number] => 20220052165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING A LATERAL INSULATOR
[patent_app_type] => utility
[patent_app_number] => 17/134706
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8777
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134706
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/134706 | Semiconductor device including a lateral insulator | Dec 27, 2020 | Issued |
Array
(
[id] => 18456491
[patent_doc_number] => 20230197773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 17/925806
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6108
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 303
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17925806
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/925806 | Semiconductor device and preparation method thereof | Dec 27, 2020 | Issued |
Array
(
[id] => 17986344
[patent_doc_number] => 20220352381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => ELECTRODE STRUCTURE, MANUFACTURING METHOD THEREOF, AND THIN FILM TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/255445
[patent_app_country] => US
[patent_app_date] => 2020-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4681
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17255445
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/255445 | Electrode structure, manufacturing method thereof, and thin film transistor | Dec 17, 2020 | Issued |
Array
(
[id] => 17787952
[patent_doc_number] => 11411089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Semiconductor device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/111466
[patent_app_country] => US
[patent_app_date] => 2020-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 27
[patent_no_of_words] => 7085
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17111466
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/111466 | Semiconductor device and manufacturing method thereof | Dec 2, 2020 | Issued |
Array
(
[id] => 17085569
[patent_doc_number] => 20210280576
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-09
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/950200
[patent_app_country] => US
[patent_app_date] => 2020-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3855
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950200
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/950200 | Semiconductor device | Nov 16, 2020 | Issued |
Array
(
[id] => 17926043
[patent_doc_number] => 11469307
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device
[patent_app_type] => utility
[patent_app_number] => 17/098867
[patent_app_country] => US
[patent_app_date] => 2020-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 62
[patent_no_of_words] => 11650
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17098867
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/098867 | Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device | Nov 15, 2020 | Issued |
Array
(
[id] => 17772598
[patent_doc_number] => 11404552
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Fin Field-Effect Transistor and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/097499
[patent_app_country] => US
[patent_app_date] => 2020-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 7412
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097499
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/097499 | Fin Field-Effect Transistor and method of forming the same | Nov 12, 2020 | Issued |
Array
(
[id] => 19244623
[patent_doc_number] => 12015078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Manufacturing method of semiconductor power device
[patent_app_type] => utility
[patent_app_number] => 17/622021
[patent_app_country] => US
[patent_app_date] => 2020-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2339
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17622021
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/622021 | Manufacturing method of semiconductor power device | Nov 11, 2020 | Issued |
Array
(
[id] => 17787742
[patent_doc_number] => 11410876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Semiconductor device with air gaps and method of fabrication thereof
[patent_app_type] => utility
[patent_app_number] => 17/090028
[patent_app_country] => US
[patent_app_date] => 2020-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 146
[patent_no_of_words] => 14350
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17090028
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/090028 | Semiconductor device with air gaps and method of fabrication thereof | Nov 4, 2020 | Issued |
Array
(
[id] => 17583250
[patent_doc_number] => 20220140105
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => FET USING TRENCH ISOLATION AS THE GATE DIELECTRIC
[patent_app_type] => utility
[patent_app_number] => 17/087379
[patent_app_country] => US
[patent_app_date] => 2020-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4790
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087379
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/087379 | FET using trench isolation as the gate dielectric | Nov 1, 2020 | Issued |
Array
(
[id] => 18001067
[patent_doc_number] => 11502178
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-15
[patent_title] => Field effect transistor with at least partially recessed field plate
[patent_app_type] => utility
[patent_app_number] => 17/081476
[patent_app_country] => US
[patent_app_date] => 2020-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 7585
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081476
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/081476 | Field effect transistor with at least partially recessed field plate | Oct 26, 2020 | Issued |
Array
(
[id] => 17607185
[patent_doc_number] => 11335677
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-17
[patent_title] => Combined MCD and MOS transistor semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/075960
[patent_app_country] => US
[patent_app_date] => 2020-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4516
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17075960
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/075960 | Combined MCD and MOS transistor semiconductor device | Oct 20, 2020 | Issued |
Array
(
[id] => 17847916
[patent_doc_number] => 11437301
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Device with an etch stop layer and method therefor
[patent_app_type] => utility
[patent_app_number] => 17/071446
[patent_app_country] => US
[patent_app_date] => 2020-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 13915
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071446
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/071446 | Device with an etch stop layer and method therefor | Oct 14, 2020 | Issued |
Array
(
[id] => 17730933
[patent_doc_number] => 11387335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Optimized contact structure
[patent_app_type] => utility
[patent_app_number] => 17/061709
[patent_app_country] => US
[patent_app_date] => 2020-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 7689
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17061709
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/061709 | Optimized contact structure | Oct 1, 2020 | Issued |
Array
(
[id] => 17848120
[patent_doc_number] => 11437507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Semiconductor devices with low resistance gate and shield electrodes and methods
[patent_app_type] => utility
[patent_app_number] => 17/060280
[patent_app_country] => US
[patent_app_date] => 2020-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 7364
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17060280
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/060280 | Semiconductor devices with low resistance gate and shield electrodes and methods | Sep 30, 2020 | Issued |
Array
(
[id] => 17500869
[patent_doc_number] => 11289579
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-29
[patent_title] => P-type dipole for p-FET
[patent_app_type] => utility
[patent_app_number] => 17/034116
[patent_app_country] => US
[patent_app_date] => 2020-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 7752
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17034116
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/034116 | P-type dipole for p-FET | Sep 27, 2020 | Issued |
Array
(
[id] => 17893351
[patent_doc_number] => 11456335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-27
[patent_title] => Vertical memory devices
[patent_app_type] => utility
[patent_app_number] => 17/031037
[patent_app_country] => US
[patent_app_date] => 2020-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 12087
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17031037
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/031037 | Vertical memory devices | Sep 23, 2020 | Issued |
Array
(
[id] => 17623359
[patent_doc_number] => 11342425
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => Semiconductor device having needle-shape field plate trenches and needle-shaped gate trenches
[patent_app_type] => utility
[patent_app_number] => 17/029519
[patent_app_country] => US
[patent_app_date] => 2020-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 23
[patent_no_of_words] => 4674
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17029519
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/029519 | Semiconductor device having needle-shape field plate trenches and needle-shaped gate trenches | Sep 22, 2020 | Issued |
Array
(
[id] => 17100386
[patent_doc_number] => 20210288177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-16
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/021063
[patent_app_country] => US
[patent_app_date] => 2020-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9977
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021063
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/021063 | Semiconductor device | Sep 14, 2020 | Issued |